Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 3438213
[patent_doc_number] => 05463587
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-31
[patent_title] => 'Nonvolatile semiconductor system'
[patent_app_type] => 1
[patent_app_number] => 8/390286
[patent_app_country] => US
[patent_app_date] => 1995-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 11334
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/463/05463587.pdf
[firstpage_image] =>[orig_patent_app_number] => 390286
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/390286 | Nonvolatile semiconductor system | Feb 14, 1995 | Issued |
Array
(
[id] => 3518856
[patent_doc_number] => 05587943
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Nonvolatile magnetoresistive memory with fully closed flux operation'
[patent_app_type] => 1
[patent_app_number] => 8/388035
[patent_app_country] => US
[patent_app_date] => 1995-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 18
[patent_no_of_words] => 10693
[patent_no_of_claims] => 68
[patent_no_of_ind_claims] => 16
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/587/05587943.pdf
[firstpage_image] =>[orig_patent_app_number] => 388035
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/388035 | Nonvolatile magnetoresistive memory with fully closed flux operation | Feb 12, 1995 | Issued |
Array
(
[id] => 3558267
[patent_doc_number] => 05555524
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-10
[patent_title] => 'Semi-synchronous dual port FIFO'
[patent_app_type] => 1
[patent_app_number] => 8/388234
[patent_app_country] => US
[patent_app_date] => 1995-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2656
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/555/05555524.pdf
[firstpage_image] =>[orig_patent_app_number] => 388234
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/388234 | Semi-synchronous dual port FIFO | Feb 12, 1995 | Issued |
Array
(
[id] => 3591984
[patent_doc_number] => 05581506
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-03
[patent_title] => 'Level-shifter, semiconductor integrated circuit, and control methods thereof'
[patent_app_type] => 1
[patent_app_number] => 8/382530
[patent_app_country] => US
[patent_app_date] => 1995-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 55
[patent_figures_cnt] => 64
[patent_no_of_words] => 15134
[patent_no_of_claims] => 49
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/581/05581506.pdf
[firstpage_image] =>[orig_patent_app_number] => 382530
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/382530 | Level-shifter, semiconductor integrated circuit, and control methods thereof | Feb 1, 1995 | Issued |
Array
(
[id] => 3563179
[patent_doc_number] => 05574690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-12
[patent_title] => 'Self-test device for memories, decoders, etc.'
[patent_app_type] => 1
[patent_app_number] => 8/374672
[patent_app_country] => US
[patent_app_date] => 1995-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 5049
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/574/05574690.pdf
[firstpage_image] =>[orig_patent_app_number] => 374672
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/374672 | Self-test device for memories, decoders, etc. | Jan 19, 1995 | Issued |
Array
(
[id] => 3526836
[patent_doc_number] => 05576990
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-19
[patent_title] => 'Voltage regulator for non-volatile semiconductor memory devices'
[patent_app_type] => 1
[patent_app_number] => 8/367538
[patent_app_country] => US
[patent_app_date] => 1995-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 5071
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/576/05576990.pdf
[firstpage_image] =>[orig_patent_app_number] => 367538
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/367538 | Voltage regulator for non-volatile semiconductor memory devices | Jan 2, 1995 | Issued |
Array
(
[id] => 3608620
[patent_doc_number] => 05559741
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/366729
[patent_app_country] => US
[patent_app_date] => 1994-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3461
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 258
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559741.pdf
[firstpage_image] =>[orig_patent_app_number] => 366729
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/366729 | Semiconductor memory device | Dec 29, 1994 | Issued |
Array
(
[id] => 3585274
[patent_doc_number] => 05523980
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/364990
[patent_app_country] => US
[patent_app_date] => 1994-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 65
[patent_no_of_words] => 8521
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/523/05523980.pdf
[firstpage_image] =>[orig_patent_app_number] => 364990
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/364990 | Semiconductor memory device | Dec 27, 1994 | Issued |
Array
(
[id] => 3633136
[patent_doc_number] => 05594703
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'End-of-count detecting device for nonvolatile memories'
[patent_app_type] => 1
[patent_app_number] => 8/365510
[patent_app_country] => US
[patent_app_date] => 1994-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3402
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/594/05594703.pdf
[firstpage_image] =>[orig_patent_app_number] => 365510
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/365510 | End-of-count detecting device for nonvolatile memories | Dec 27, 1994 | Issued |
Array
(
[id] => 3591970
[patent_doc_number] => 05581505
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-03
[patent_title] => 'Ram/ROM hybrid memory architecture'
[patent_app_type] => 1
[patent_app_number] => 8/366334
[patent_app_country] => US
[patent_app_date] => 1994-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 48
[patent_no_of_words] => 16942
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/581/05581505.pdf
[firstpage_image] =>[orig_patent_app_number] => 366334
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/366334 | Ram/ROM hybrid memory architecture | Dec 27, 1994 | Issued |
08/362860 | SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME | Dec 22, 1994 | Abandoned |
Array
(
[id] => 3741385
[patent_doc_number] => 05636176
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-03
[patent_title] => 'Synchronous DRAM responsive to first and second clock signals'
[patent_app_type] => 1
[patent_app_number] => 8/362289
[patent_app_country] => US
[patent_app_date] => 1994-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 6198
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 337
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/636/05636176.pdf
[firstpage_image] =>[orig_patent_app_number] => 362289
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/362289 | Synchronous DRAM responsive to first and second clock signals | Dec 21, 1994 | Issued |
Array
(
[id] => 3523516
[patent_doc_number] => 05513147
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-30
[patent_title] => 'Row driving circuit for memory devices'
[patent_app_type] => 1
[patent_app_number] => 8/359052
[patent_app_country] => US
[patent_app_date] => 1994-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4528
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/513/05513147.pdf
[firstpage_image] =>[orig_patent_app_number] => 359052
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/359052 | Row driving circuit for memory devices | Dec 18, 1994 | Issued |
Array
(
[id] => 3592041
[patent_doc_number] => 05581509
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-03
[patent_title] => 'Double-row address decoding and selection circuitry for an electrically erasable and programmable non-volatile memory device with redundancy, particularly for flash EEPROM devices'
[patent_app_type] => 1
[patent_app_number] => 8/356740
[patent_app_country] => US
[patent_app_date] => 1994-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3600
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/581/05581509.pdf
[firstpage_image] =>[orig_patent_app_number] => 356740
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/356740 | Double-row address decoding and selection circuitry for an electrically erasable and programmable non-volatile memory device with redundancy, particularly for flash EEPROM devices | Dec 14, 1994 | Issued |
Array
(
[id] => 3549548
[patent_doc_number] => 05481492
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-02
[patent_title] => 'Floating gate injection voltage regulator'
[patent_app_type] => 1
[patent_app_number] => 8/355780
[patent_app_country] => US
[patent_app_date] => 1994-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3513
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/481/05481492.pdf
[firstpage_image] =>[orig_patent_app_number] => 355780
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/355780 | Floating gate injection voltage regulator | Dec 13, 1994 | Issued |
Array
(
[id] => 3598497
[patent_doc_number] => 05517441
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-14
[patent_title] => 'Content addressable memory circuitry and method of operation'
[patent_app_type] => 1
[patent_app_number] => 8/355864
[patent_app_country] => US
[patent_app_date] => 1994-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 10890
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/517/05517441.pdf
[firstpage_image] =>[orig_patent_app_number] => 355864
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/355864 | Content addressable memory circuitry and method of operation | Dec 13, 1994 | Issued |
Array
(
[id] => 3704238
[patent_doc_number] => 05680350
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-21
[patent_title] => 'Method for narrowing threshold voltage distribution in a block erased flash memory array'
[patent_app_type] => 1
[patent_app_number] => 8/355752
[patent_app_country] => US
[patent_app_date] => 1994-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2247
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/680/05680350.pdf
[firstpage_image] =>[orig_patent_app_number] => 355752
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/355752 | Method for narrowing threshold voltage distribution in a block erased flash memory array | Dec 13, 1994 | Issued |
Array
(
[id] => 3553544
[patent_doc_number] => 05555203
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-10
[patent_title] => 'Dynamic semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/358582
[patent_app_country] => US
[patent_app_date] => 1994-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 32
[patent_no_of_words] => 13775
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/555/05555203.pdf
[firstpage_image] =>[orig_patent_app_number] => 358582
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/358582 | Dynamic semiconductor memory device | Dec 12, 1994 | Issued |
Array
(
[id] => 3558191
[patent_doc_number] => 05546352
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-13
[patent_title] => 'Semiconductor memory device having decoder'
[patent_app_type] => 1
[patent_app_number] => 8/354760
[patent_app_country] => US
[patent_app_date] => 1994-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 27
[patent_no_of_words] => 12866
[patent_no_of_claims] => 23
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[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/546/05546352.pdf
[firstpage_image] =>[orig_patent_app_number] => 354760
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/354760 | Semiconductor memory device having decoder | Dec 11, 1994 | Issued |
Array
(
[id] => 3534653
[patent_doc_number] => 05504709
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-02
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/354831
[patent_app_country] => US
[patent_app_date] => 1994-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 6885
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 397
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/504/05504709.pdf
[firstpage_image] =>[orig_patent_app_number] => 354831
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/354831 | Semiconductor memory device | Dec 7, 1994 | Issued |