Search

Lee S Cohen

Examiner (ID: 13979, Phone: (571)272-4763 , Office: P/3739 )

Most Active Art Unit
3739
Art Unit(s)
3739, 3794, 3305, 3311, 3736, 0
Total Applications
3720
Issued Applications
3006
Pending Applications
173
Abandoned Applications
543

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18092195 [patent_doc_number] => 20220410536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => ADHESIVE MEMBER AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/819298 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17819298 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/819298
Adhesive member and display device including the same Aug 10, 2022 Issued
Array ( [id] => 18872327 [patent_doc_number] => 11860121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Integrated circuit with BioFETs [patent_app_type] => utility [patent_app_number] => 17/884382 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9583 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884382 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884382
Integrated circuit with BioFETs Aug 8, 2022 Issued
Array ( [id] => 18008697 [patent_doc_number] => 20220367464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/876794 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876794
Integrated circuit and manufacturing method thereof Jul 28, 2022 Issued
Array ( [id] => 18008492 [patent_doc_number] => 20220367259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => LOW-K DIELECTRIC DAMAGE PREVENTION [patent_app_type] => utility [patent_app_number] => 17/875061 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875061 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875061
LOW-K DIELECTRIC DAMAGE PREVENTION Jul 26, 2022 Pending
Array ( [id] => 18068237 [patent_doc_number] => 20220399325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => LTHC AS CHARGING BARRIER IN INFO PACKAGE FORMATION [patent_app_type] => utility [patent_app_number] => 17/874492 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874492
LTHC as charging barrier in info package formation Jul 26, 2022 Issued
Array ( [id] => 18008572 [patent_doc_number] => 20220367339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => WAFER LEVEL STACKED STRUCTURES HAVING INTEGRATED PASSIVE FEATURES [patent_app_type] => utility [patent_app_number] => 17/875205 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875205 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875205
Wafer level stacked structures having integrated passive features Jul 26, 2022 Issued
Array ( [id] => 17933260 [patent_doc_number] => 20220328386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => Method of Making an Integrated Circuit Package Including an Integrated Circuit Die Soldered to a Bond Pad of a Redistribution Structure [patent_app_type] => utility [patent_app_number] => 17/852766 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852766
Method of making an integrated circuit package including an integrated circuit die soldered to a bond pad of a redistribution structure Jun 28, 2022 Issued
Array ( [id] => 17933645 [patent_doc_number] => 20220328771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 17/848161 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848161 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848161
PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING DEVICE Jun 22, 2022 Abandoned
Array ( [id] => 17917458 [patent_doc_number] => 20220319854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SELECTIVE DEPOSITION USING HYDROLYSIS [patent_app_type] => utility [patent_app_number] => 17/808046 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/808046
SELECTIVE DEPOSITION USING HYDROLYSIS Jun 20, 2022 Abandoned
Array ( [id] => 18320277 [patent_doc_number] => 20230118405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME [patent_app_type] => utility [patent_app_number] => 17/845092 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845092
Semiconductor structure and method for forming same Jun 20, 2022 Issued
Array ( [id] => 18081144 [patent_doc_number] => 20220406756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/840164 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840164
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Jun 13, 2022 Pending
Array ( [id] => 18679794 [patent_doc_number] => 20230317451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/840480 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840480
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES Jun 13, 2022 Pending
Array ( [id] => 18661413 [patent_doc_number] => 20230307427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => Packages Including Interconnect Die Embedded in Package Substrates [patent_app_type] => utility [patent_app_number] => 17/806329 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806329
Packages Including Interconnect Die Embedded in Package Substrates Jun 9, 2022 Pending
Array ( [id] => 19679273 [patent_doc_number] => 12191145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Semiconductor device and formation method thereof [patent_app_type] => utility [patent_app_number] => 17/834596 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 45 [patent_no_of_words] => 6971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834596 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/834596
Semiconductor device and formation method thereof Jun 6, 2022 Issued
Array ( [id] => 18822982 [patent_doc_number] => 20230397323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => PACKAGE BOTTOM SIDE THERMAL SOLUTION WITH DISCRETE HAT-SHAPED COPPER SPREADER COMPONENT [patent_app_type] => utility [patent_app_number] => 17/834641 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834641 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/834641
PACKAGE BOTTOM SIDE THERMAL SOLUTION WITH DISCRETE HAT-SHAPED COPPER SPREADER COMPONENT Jun 6, 2022 Pending
Array ( [id] => 18608276 [patent_doc_number] => 11749755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Method of forming FinFET with low-dielectric-constant gate electrode spacers [patent_app_type] => utility [patent_app_number] => 17/831077 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 6686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831077 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831077
Method of forming FinFET with low-dielectric-constant gate electrode spacers Jun 1, 2022 Issued
Array ( [id] => 18848770 [patent_doc_number] => 20230411174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Package Assembly and Method of Attaching Multi-Height Dies/Modules to Multi-Chip Active/Passive Substrate [patent_app_type] => utility [patent_app_number] => 17/829252 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16207 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829252 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/829252
Package Assembly and Method of Attaching Multi-Height Dies/Modules to Multi-Chip Active/Passive Substrate May 30, 2022 Pending
Array ( [id] => 18849049 [patent_doc_number] => 20230411453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHODS OF FORMATION [patent_app_type] => utility [patent_app_number] => 17/804427 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804427 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/804427
SEMICONDUCTOR DEVICE AND METHODS OF FORMATION May 26, 2022 Pending
Array ( [id] => 17871003 [patent_doc_number] => 20220293740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/826435 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826435 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/826435
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR DEVICE May 26, 2022 Pending
Array ( [id] => 17855265 [patent_doc_number] => 20220285308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => RADAR DEVICE [patent_app_type] => utility [patent_app_number] => 17/826418 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/826418
Radar device May 26, 2022 Issued
Menu