Search

Leo B Tentoni

Examiner (ID: 106, Phone: (571)272-1209 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1732, 1307, 1791
Total Applications
4174
Issued Applications
3256
Pending Applications
267
Abandoned Applications
650

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14459713 [patent_doc_number] => 10325829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => TIM strain mitigation in electronic modules [patent_app_type] => utility [patent_app_number] => 15/791809 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 3435 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791809 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791809
TIM strain mitigation in electronic modules Oct 23, 2017 Issued
Array ( [id] => 12188772 [patent_doc_number] => 20180047708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'Semiconductor Packaging Structure and Method' [patent_app_type] => utility [patent_app_number] => 15/791071 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791071 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791071
Semiconductor packaging structure and method Oct 22, 2017 Issued
Array ( [id] => 15792005 [patent_doc_number] => 10629735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Reacted conductive gate electrodes and methods of making the same [patent_app_type] => utility [patent_app_number] => 15/784925 [patent_app_country] => US [patent_app_date] => 2017-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15784925 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/784925
Reacted conductive gate electrodes and methods of making the same Oct 15, 2017 Issued
Array ( [id] => 12162508 [patent_doc_number] => 20180033774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'SEMICONDUCTOR PACKAGE ASSEMBLY WITH PASSIVE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/726471 [patent_app_country] => US [patent_app_date] => 2017-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5211 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15726471 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/726471
Semiconductor package assembly with passive device Oct 5, 2017 Issued
Array ( [id] => 15672993 [patent_doc_number] => 10600737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Prevention of premature breakdown of interline porous dielectrics in an integrated circuit [patent_app_type] => utility [patent_app_number] => 15/722703 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2850 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15722703 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/722703
Prevention of premature breakdown of interline porous dielectrics in an integrated circuit Oct 1, 2017 Issued
Array ( [id] => 12122609 [patent_doc_number] => 20180006195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Quantum Dot (QD) Polymer Composites for On-Chip Light Emitting Diode (LED) Applications' [patent_app_type] => utility [patent_app_number] => 15/709306 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11395 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15709306 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/709306
Quantum dot (QD) polymer composites for on-chip light emitting diode (LED) applications Sep 18, 2017 Issued
Array ( [id] => 12693496 [patent_doc_number] => 20180122998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => Quantum Dot (QD) Polymer Composites for On-Chip Light Emitting Diode (LED) Applications [patent_app_type] => utility [patent_app_number] => 15/709298 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15709298 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/709298
Quantum Dot (QD) Polymer Composites for On-Chip Light Emitting Diode (LED) Applications Sep 18, 2017 Abandoned
Array ( [id] => 15475369 [patent_doc_number] => 10553569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Multi-die structure and method for forming same [patent_app_type] => utility [patent_app_number] => 15/699373 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 9400 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15699373 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/699373
Multi-die structure and method for forming same Sep 7, 2017 Issued
Array ( [id] => 14024519 [patent_doc_number] => 20190074253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => ARC-RESISTANT CRACKSTOP [patent_app_type] => utility [patent_app_number] => 15/698027 [patent_app_country] => US [patent_app_date] => 2017-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15698027 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/698027
Arc-resistant crackstop Sep 6, 2017 Issued
Array ( [id] => 15286407 [patent_doc_number] => 10515873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-24 [patent_title] => Semiconductor device and method for manufacturing same [patent_app_type] => utility [patent_app_number] => 15/698328 [patent_app_country] => US [patent_app_date] => 2017-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 58 [patent_no_of_words] => 10522 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15698328 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/698328
Semiconductor device and method for manufacturing same Sep 6, 2017 Issued
Array ( [id] => 15234173 [patent_doc_number] => 10504816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Thermoelectric cooler (TEC) for spot cooling of 2.5D/3D IC packages [patent_app_type] => utility [patent_app_number] => 15/696962 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5261 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15696962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/696962
Thermoelectric cooler (TEC) for spot cooling of 2.5D/3D IC packages Sep 5, 2017 Issued
Array ( [id] => 12896380 [patent_doc_number] => 20180190635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => ELECTRONIC DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 15/696973 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15696973 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/696973
Electronic device package Sep 5, 2017 Issued
Array ( [id] => 12236007 [patent_doc_number] => 20180068870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'ELECTRONIC PACKAGE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/696389 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15696389 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/696389
ELECTRONIC PACKAGE AND METHOD FOR FABRICATING THE SAME Sep 5, 2017 Abandoned
Array ( [id] => 12236005 [patent_doc_number] => 20180068868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'ARTICLES HAVING HOLES WITH MORPHOLOGY ATTRIBUTES AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/696736 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16980 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15696736 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/696736
Articles having holes with morphology attributes and methods for fabricating the same Sep 5, 2017 Issued
Array ( [id] => 13976719 [patent_doc_number] => 10217726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-26 [patent_title] => Stacked semiconductor dies including inductors and associated methods [patent_app_type] => utility [patent_app_number] => 15/693039 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7716 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693039 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693039
Stacked semiconductor dies including inductors and associated methods Aug 30, 2017 Issued
Array ( [id] => 13976719 [patent_doc_number] => 10217726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-26 [patent_title] => Stacked semiconductor dies including inductors and associated methods [patent_app_type] => utility [patent_app_number] => 15/693039 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7716 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693039 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693039
Stacked semiconductor dies including inductors and associated methods Aug 30, 2017 Issued
Array ( [id] => 13996149 [patent_doc_number] => 20190067232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => Method for Solder Bridging Elimination for Bulk Solder C2S Interconnects [patent_app_type] => utility [patent_app_number] => 15/692803 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4080 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692803 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692803
Method for Solder Bridging Elimination for Bulk Solder C2S Interconnects Aug 30, 2017 Abandoned
Array ( [id] => 15139263 [patent_doc_number] => 10483115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/692528 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692528 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692528
Semiconductor device and method for manufacturing the same Aug 30, 2017 Issued
Array ( [id] => 13976719 [patent_doc_number] => 10217726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-26 [patent_title] => Stacked semiconductor dies including inductors and associated methods [patent_app_type] => utility [patent_app_number] => 15/693039 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7716 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693039 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693039
Stacked semiconductor dies including inductors and associated methods Aug 30, 2017 Issued
Array ( [id] => 12263652 [patent_doc_number] => 20180082848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'ELECTRONIC DEVICE, ELECTRONIC MODULE AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/692495 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3690 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692495 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692495
Electronic device, electronic module and methods for fabricating the same Aug 30, 2017 Issued
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