Search

Leo B Tentoni

Examiner (ID: 106, Phone: (571)272-1209 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1732, 1307, 1791
Total Applications
4174
Issued Applications
3256
Pending Applications
267
Abandoned Applications
650

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18608178 [patent_doc_number] => 11749656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Module configurations for integrated III-Nitride devices [patent_app_type] => utility [patent_app_number] => 17/308366 [patent_app_country] => US [patent_app_date] => 2021-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 14062 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308366 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308366
Module configurations for integrated III-Nitride devices May 4, 2021 Issued
Array ( [id] => 17986019 [patent_doc_number] => 20220352056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR PACKAGE WITH WIRE BOND JOINTS AND RELATED METHODS OF MANUFACTURING [patent_app_type] => utility [patent_app_number] => 17/243056 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243056 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/243056
Semiconductor package with wire bond joints and related methods of manufacturing Apr 27, 2021 Issued
Array ( [id] => 16995440 [patent_doc_number] => 20210233860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/230509 [patent_app_country] => US [patent_app_date] => 2021-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230509 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/230509
Integrated circuit device and method of manufacturing the same Apr 13, 2021 Issued
Array ( [id] => 18431720 [patent_doc_number] => 11676951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Package for power semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/219123 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6088 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219123 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219123
Package for power semiconductor devices Mar 30, 2021 Issued
Array ( [id] => 17115685 [patent_doc_number] => 20210296282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => DIMENSION COMPENSATION CONTROL FOR DIRECTLY BONDED STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/206725 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17206725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/206725
Dimension compensation control for directly bonded structures Mar 18, 2021 Issued
Array ( [id] => 17130346 [patent_doc_number] => 20210305115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/206295 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17206295 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/206295
Semiconductor device Mar 18, 2021 Issued
Array ( [id] => 16936448 [patent_doc_number] => 20210202337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/202542 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202542 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202542
Semiconductor device Mar 15, 2021 Issued
Array ( [id] => 18967494 [patent_doc_number] => 11901275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Semiconductor device package [patent_app_type] => utility [patent_app_number] => 17/201929 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 5759 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201929 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/201929
Semiconductor device package Mar 14, 2021 Issued
Array ( [id] => 18357873 [patent_doc_number] => 11646279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Contact pad structures and methods for fabricating contact pad structures [patent_app_type] => utility [patent_app_number] => 17/184659 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6201 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184659
Contact pad structures and methods for fabricating contact pad structures Feb 24, 2021 Issued
Array ( [id] => 16936574 [patent_doc_number] => 20210202463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => Buffer Design for Package Integration [patent_app_type] => utility [patent_app_number] => 17/181720 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17181720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/181720
Buffer design for package integration Feb 21, 2021 Issued
Array ( [id] => 16904886 [patent_doc_number] => 20210183802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => Method for Solder Bridging Elimination for Bulk Solder C2S Interconnects [patent_app_type] => utility [patent_app_number] => 17/176095 [patent_app_country] => US [patent_app_date] => 2021-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17176095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/176095
Method for solder bridging elimination for bulk solder C2S interconnects Feb 14, 2021 Issued
Array ( [id] => 16858629 [patent_doc_number] => 20210159374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => OPTICAL SEMICONDUCTOR ELEMENT MOUNTING PACKAGE AND OPTICAL SEMICONDUCTOR DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/169054 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6655 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169054 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/169054
Optical semiconductor element mounting package and optical semiconductor device using the same Feb 4, 2021 Issued
Array ( [id] => 18447065 [patent_doc_number] => 11682641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Integrated circuit bond pad with multi-material toothed structure [patent_app_type] => utility [patent_app_number] => 17/163645 [patent_app_country] => US [patent_app_date] => 2021-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 8215 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163645 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/163645
Integrated circuit bond pad with multi-material toothed structure Jan 31, 2021 Issued
Array ( [id] => 17810914 [patent_doc_number] => 20220262749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => INTEGRATED CIRCUIT STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/160400 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17160400 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/160400
Integrated circuit structure and fabrication method thereof Jan 27, 2021 Issued
Array ( [id] => 17708704 [patent_doc_number] => 20220208712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => MULTI-LEVEL BRIDGE INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 17/134601 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134601 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134601
MULTI-LEVEL BRIDGE INTERCONNECTS Dec 27, 2020 Pending
Array ( [id] => 18249106 [patent_doc_number] => 11605706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/123266 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 12111 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17123266 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/123266
Semiconductor device Dec 15, 2020 Issued
Array ( [id] => 16723863 [patent_doc_number] => 20210091010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => BEOL ALTERNATIVE METAL INTERCONNECTS: INTEGRATION AND PROCESS [patent_app_type] => utility [patent_app_number] => 17/115160 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115160 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/115160
BEOL alternative metal interconnects: integration and process Dec 7, 2020 Issued
Array ( [id] => 16677446 [patent_doc_number] => 20210066212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => Electrically or Temperature Activated Shape-Memory Materials for Warpage Control [patent_app_type] => utility [patent_app_number] => 16/950379 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950379 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950379
Electrically or temperature activated shape-memory materials for warpage control Nov 16, 2020 Issued
Array ( [id] => 18088644 [patent_doc_number] => 11538783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/088350 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 9765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088350 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088350
Semiconductor device Nov 2, 2020 Issued
Array ( [id] => 16631679 [patent_doc_number] => 20210050332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => Packages with Stacked Dies and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 17/087106 [patent_app_country] => US [patent_app_date] => 2020-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/087106
Packages with stacked dies and methods of forming the same Nov 1, 2020 Issued
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