
Leo B Tentoni
Examiner (ID: 11342, Phone: (571)272-1209 , Office: P/1742 )
| Most Active Art Unit | 1742 |
| Art Unit(s) | 1732, 1791, 1742, 1307 |
| Total Applications | 4287 |
| Issued Applications | 3378 |
| Pending Applications | 281 |
| Abandoned Applications | 662 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5239722
[patent_doc_number] => 20070018213
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-25
[patent_title] => 'CMOS image sensor and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/529510
[patent_app_country] => US
[patent_app_date] => 2006-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3348
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20070018213.pdf
[firstpage_image] =>[orig_patent_app_number] => 11529510
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/529510 | CMOS image sensor and method of fabricating the same | Sep 28, 2006 | Issued |
Array
(
[id] => 4833511
[patent_doc_number] => 20080132058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-05
[patent_title] => 'ELECTRICAL PROGRAMMABLE METAL RESISTOR'
[patent_app_type] => utility
[patent_app_number] => 11/535833
[patent_app_country] => US
[patent_app_date] => 2006-09-27
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11535833
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/535833 | Electrical programmable metal resistor | Sep 26, 2006 | Issued |
Array
(
[id] => 807198
[patent_doc_number] => 07420229
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-02
[patent_title] => 'Failure analysis vehicle for yield enhancement with self test at speed burnin capability for reliability testing'
[patent_app_type] => utility
[patent_app_number] => 11/527108
[patent_app_country] => US
[patent_app_date] => 2006-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
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[pdf_file] => patents/07/420/07420229.pdf
[firstpage_image] =>[orig_patent_app_number] => 11527108
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/527108 | Failure analysis vehicle for yield enhancement with self test at speed burnin capability for reliability testing | Sep 24, 2006 | Issued |
Array
(
[id] => 4701908
[patent_doc_number] => 20080061430
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-13
[patent_title] => 'Structure of heat dissipated submount'
[patent_app_type] => utility
[patent_app_number] => 11/526070
[patent_app_country] => US
[patent_app_date] => 2006-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 1140
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[pdf_file] => publications/A1/0061/20080061430.pdf
[firstpage_image] =>[orig_patent_app_number] => 11526070
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/526070 | Structure of heat dissipated submount | Sep 24, 2006 | Abandoned |
Array
(
[id] => 4992207
[patent_doc_number] => 20070007551
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-11
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
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[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11520622
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/520622 | Semiconductor integrated circuit | Sep 13, 2006 | Issued |
Array
(
[id] => 588847
[patent_doc_number] => 07442997
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-28
[patent_title] => 'Three-dimensional memory cells'
[patent_app_type] => utility
[patent_app_number] => 11/309656
[patent_app_country] => US
[patent_app_date] => 2006-09-07
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[pdf_file] => patents/07/442/07442997.pdf
[firstpage_image] =>[orig_patent_app_number] => 11309656
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/309656 | Three-dimensional memory cells | Sep 6, 2006 | Issued |
Array
(
[id] => 5105593
[patent_doc_number] => 20070064468
[patent_country] => US
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[patent_issue_date] => 2007-03-22
[patent_title] => 'Charge trap memory device comprising composite of nanoparticles and method of fabricating the charge trap memory device'
[patent_app_type] => utility
[patent_app_number] => 11/517030
[patent_app_country] => US
[patent_app_date] => 2006-09-07
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 6412
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[pdf_file] => publications/A1/0064/20070064468.pdf
[firstpage_image] =>[orig_patent_app_number] => 11517030
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/517030 | Charge trap memory device comprising composite of nanoparticles and method of fabricating the charge trap memory device | Sep 6, 2006 | Issued |
Array
(
[id] => 5107201
[patent_doc_number] => 20070066079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-22
[patent_title] => 'Sealing porous dielectrics with silane coupling reagents'
[patent_app_type] => utility
[patent_app_number] => 11/516410
[patent_app_country] => US
[patent_app_date] => 2006-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0066/20070066079.pdf
[firstpage_image] =>[orig_patent_app_number] => 11516410
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/516410 | Sealing porous dielectrics with silane coupling reagents | Sep 4, 2006 | Issued |
Array
(
[id] => 5346048
[patent_doc_number] => 20090001409
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'Semiconductor Light Emitting Device And Illuminating Device Using It'
[patent_app_type] => utility
[patent_app_number] => 11/991418
[patent_app_country] => US
[patent_app_date] => 2006-09-04
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[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0001/20090001409.pdf
[firstpage_image] =>[orig_patent_app_number] => 11991418
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/991418 | Semiconductor light emitting device and illuminating device using it | Sep 3, 2006 | Issued |
Array
(
[id] => 4768832
[patent_doc_number] => 20080054488
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-06
[patent_title] => 'Systems and arrangements for interconnecting integrated circuit dies'
[patent_app_type] => utility
[patent_app_number] => 11/513850
[patent_app_country] => US
[patent_app_date] => 2006-08-31
[patent_effective_date] => 0000-00-00
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Array
(
[id] => 4768840
[patent_doc_number] => 20080054496
[patent_country] => US
[patent_kind] => A1
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[patent_title] => 'High temperature operating package and circuit design'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/512860 | High temperature operating package and circuit design | Aug 29, 2006 | Abandoned |
Array
(
[id] => 873328
[patent_doc_number] => 07361984
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[patent_title] => 'Chip package structure'
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Array
(
[id] => 5145600
[patent_doc_number] => 20070045654
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[patent_title] => 'Group III-nitride semiconductor thin film, method for fabricating the same, and group III-nitride semiconductor light emitting device'
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Array
(
[id] => 4583332
[patent_doc_number] => 07834451
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[patent_title] => 'Film tray for fabricating flexible display'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/512649 | Film tray for fabricating flexible display | Aug 28, 2006 | Issued |
Array
(
[id] => 5599590
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Array
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[id] => 4731055
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Array
(
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Array
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Array
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