Search

Leo B Tentoni

Examiner (ID: 11342, Phone: (571)272-1209 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1732, 1791, 1742, 1307
Total Applications
4287
Issued Applications
3378
Pending Applications
281
Abandoned Applications
662

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5874644 [patent_doc_number] => 20060166517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Phase-shifting mask and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/385156 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3370 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20060166517.pdf [firstpage_image] =>[orig_patent_app_number] => 11385156 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385156
Phase-shifting mask and semiconductor device Mar 20, 2006 Issued
Array ( [id] => 5705384 [patent_doc_number] => 20060194432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Methods of fabricating integrated circuit devices having self-aligned contact structures' [patent_app_type] => utility [patent_app_number] => 11/375914 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6410 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20060194432.pdf [firstpage_image] =>[orig_patent_app_number] => 11375914 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/375914
Methods of fabricating integrated circuit devices having self-aligned contact structures Mar 14, 2006 Issued
Array ( [id] => 5781070 [patent_doc_number] => 20060202915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Light emitting apparatus generating white light by mixing of light of a plurality of oscillation wavelengths' [patent_app_type] => utility [patent_app_number] => 11/371898 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4278 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202915.pdf [firstpage_image] =>[orig_patent_app_number] => 11371898 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/371898
Light emitting apparatus generating white light by mixing of light of a plurality of oscillation wavelengths Mar 7, 2006 Abandoned
Array ( [id] => 5780140 [patent_doc_number] => 20060202235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Solid-state imaging apparatus in which a plurality of pixels each including a photoelectric converter and a signal scanning circuit are arranged two-dimensionally' [patent_app_type] => utility [patent_app_number] => 11/370040 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7111 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202235.pdf [firstpage_image] =>[orig_patent_app_number] => 11370040 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/370040
Solid-state imaging apparatus in which a plurality of pixels each including a photoelectric converter and a signal scanning circuit are arranged two-dimensionally Mar 7, 2006 Abandoned
Array ( [id] => 5631655 [patent_doc_number] => 20060148125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Phase changable memory device structures' [patent_app_type] => utility [patent_app_number] => 11/364950 [patent_app_country] => US [patent_app_date] => 2006-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7589 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20060148125.pdf [firstpage_image] =>[orig_patent_app_number] => 11364950 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/364950
Phase changable memory device structures Feb 28, 2006 Issued
Array ( [id] => 5672609 [patent_doc_number] => 20060177964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Semiconductor module and method for producing a semiconductor module' [patent_app_type] => utility [patent_app_number] => 11/364770 [patent_app_country] => US [patent_app_date] => 2006-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3805 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20060177964.pdf [firstpage_image] =>[orig_patent_app_number] => 11364770 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/364770
Semiconductor module for making electrical contact with a connection device via a rewiring device Feb 27, 2006 Issued
Array ( [id] => 5676563 [patent_doc_number] => 20060181918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Semiconductor memory device with dual storage node and fabricating and operating methods thererof' [patent_app_type] => utility [patent_app_number] => 11/353084 [patent_app_country] => US [patent_app_date] => 2006-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6085 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20060181918.pdf [firstpage_image] =>[orig_patent_app_number] => 11353084 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/353084
Semiconductor memory device with dual storage node and fabricating and operating methods thereof Feb 13, 2006 Issued
Array ( [id] => 833433 [patent_doc_number] => 07396722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Memory device with reduced cell area' [patent_app_type] => utility [patent_app_number] => 11/347599 [patent_app_country] => US [patent_app_date] => 2006-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/396/07396722.pdf [firstpage_image] =>[orig_patent_app_number] => 11347599 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/347599
Memory device with reduced cell area Feb 2, 2006 Issued
Array ( [id] => 5908985 [patent_doc_number] => 20060125036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Solid-state imaging device and method for manufacturing solid-state imaging device' [patent_app_type] => utility [patent_app_number] => 11/343496 [patent_app_country] => US [patent_app_date] => 2006-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5470 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20060125036.pdf [firstpage_image] =>[orig_patent_app_number] => 11343496 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/343496
Solid-state imaging device and method for manufacturing solid-state imaging device Jan 30, 2006 Issued
Array ( [id] => 425468 [patent_doc_number] => 07271451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-18 [patent_title] => 'Memory cell structure' [patent_app_type] => utility [patent_app_number] => 11/340397 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5279 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 386 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/271/07271451.pdf [firstpage_image] =>[orig_patent_app_number] => 11340397 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/340397
Memory cell structure Jan 25, 2006 Issued
Array ( [id] => 5649105 [patent_doc_number] => 20060134840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Electro-optical device and semiconductor circuit' [patent_app_type] => utility [patent_app_number] => 11/339671 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 19693 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20060134840.pdf [firstpage_image] =>[orig_patent_app_number] => 11339671 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/339671
Electro-optical device and semiconductor circuit Jan 25, 2006 Issued
Array ( [id] => 5838216 [patent_doc_number] => 20060118874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/337514 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16998 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20060118874.pdf [firstpage_image] =>[orig_patent_app_number] => 11337514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/337514
Semiconductor device comprising thin film transistor Jan 23, 2006 Issued
Array ( [id] => 5741262 [patent_doc_number] => 20060086984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'Method Of Assessing Potential For Charging Damage In Integrated Circuit Designs And Structures For Preventing Charging Damage' [patent_app_type] => utility [patent_app_number] => 11/275482 [patent_app_country] => US [patent_app_date] => 2006-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2808 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20060086984.pdf [firstpage_image] =>[orig_patent_app_number] => 11275482 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275482
Integrated circuit structures for preventing charging damage Jan 8, 2006 Issued
Array ( [id] => 5556918 [patent_doc_number] => 20090268495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'Electric circuit, use of a semiconductor component and method for manufacturing a semiconductor component' [patent_app_type] => utility [patent_app_number] => 11/794777 [patent_app_country] => US [patent_app_date] => 2006-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4451 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20090268495.pdf [firstpage_image] =>[orig_patent_app_number] => 11794777 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/794777
Electric circuit, use of a semiconductor component and method for manufacturing a semiconductor component Jan 3, 2006 Abandoned
Array ( [id] => 5773966 [patent_doc_number] => 20060102949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Strapping word lines of NAND memory devices' [patent_app_type] => utility [patent_app_number] => 11/323958 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4416 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20060102949.pdf [firstpage_image] =>[orig_patent_app_number] => 11323958 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/323958
Strapping word lines of NAND memory devices Dec 29, 2005 Issued
Array ( [id] => 821887 [patent_doc_number] => 07408805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Reducing delays in word line selection' [patent_app_type] => utility [patent_app_number] => 11/323451 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4232 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408805.pdf [firstpage_image] =>[orig_patent_app_number] => 11323451 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/323451
Reducing delays in word line selection Dec 29, 2005 Issued
Array ( [id] => 5863215 [patent_doc_number] => 20060097345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Gate dielectric antifuse circuits and methods for operating same' [patent_app_type] => utility [patent_app_number] => 11/292653 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 19006 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20060097345.pdf [firstpage_image] =>[orig_patent_app_number] => 11292653 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/292653
Gate dielectric antifuse circuits and methods for operating same Dec 1, 2005 Abandoned
Array ( [id] => 5652587 [patent_doc_number] => 20060138322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Backside imaging through a doped layer' [patent_app_type] => utility [patent_app_number] => 11/290384 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7738 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20060138322.pdf [firstpage_image] =>[orig_patent_app_number] => 11290384 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/290384
Backside imaging through a doped layer Nov 29, 2005 Issued
Array ( [id] => 5611636 [patent_doc_number] => 20060113559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Notched compound semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 11/268029 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5599 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20060113559.pdf [firstpage_image] =>[orig_patent_app_number] => 11268029 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/268029
Notched compound semiconductor wafer Nov 6, 2005 Issued
Array ( [id] => 5823701 [patent_doc_number] => 20060060883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Notched compound semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 11/267968 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5555 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20060060883.pdf [firstpage_image] =>[orig_patent_app_number] => 11267968 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/267968
Notched compound semiconductor wafer Nov 6, 2005 Issued
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