
Leo B Tentoni
Examiner (ID: 11342, Phone: (571)272-1209 , Office: P/1742 )
| Most Active Art Unit | 1742 |
| Art Unit(s) | 1732, 1791, 1742, 1307 |
| Total Applications | 4287 |
| Issued Applications | 3378 |
| Pending Applications | 281 |
| Abandoned Applications | 662 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5611635
[patent_doc_number] => 20060113558
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-01
[patent_title] => 'Notched compound semiconductor wafer'
[patent_app_type] => utility
[patent_app_number] => 11/268028
[patent_app_country] => US
[patent_app_date] => 2005-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5599
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0113/20060113558.pdf
[firstpage_image] =>[orig_patent_app_number] => 11268028
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/268028 | Notched compound semiconductor wafer | Nov 6, 2005 | Issued |
| 11/262555 | METHOD AND APPARATUS FOR PROVIDING A HIGH-PERFORMANCE ACTIVE MATRIX PIXEL USING ORGANIC THIN-FILM TRANSISTORS | Oct 27, 2005 | Abandoned |
Array
(
[id] => 428986
[patent_doc_number] => 07268422
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-11
[patent_title] => 'Method of making a semiconductor device adapted to remove noise from a signal'
[patent_app_type] => utility
[patent_app_number] => 11/249569
[patent_app_country] => US
[patent_app_date] => 2005-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 32
[patent_no_of_words] => 7782
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/268/07268422.pdf
[firstpage_image] =>[orig_patent_app_number] => 11249569
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/249569 | Method of making a semiconductor device adapted to remove noise from a signal | Oct 13, 2005 | Issued |
Array
(
[id] => 5805044
[patent_doc_number] => 20060091396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Thin film transistor array panel and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/249500
[patent_app_country] => US
[patent_app_date] => 2005-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 59
[patent_figures_cnt] => 59
[patent_no_of_words] => 14038
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0091/20060091396.pdf
[firstpage_image] =>[orig_patent_app_number] => 11249500
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/249500 | Thin film transistor array panel and method for manufacturing the same | Oct 13, 2005 | Issued |
Array
(
[id] => 5805102
[patent_doc_number] => 20060091454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/249400
[patent_app_country] => US
[patent_app_date] => 2005-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4578
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0091/20060091454.pdf
[firstpage_image] =>[orig_patent_app_number] => 11249400
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/249400 | MOS transistor in an active region | Oct 13, 2005 | Issued |
Array
(
[id] => 315149
[patent_doc_number] => 07525119
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-28
[patent_title] => 'Light emitting display device using thin film transistors and electro-luminescence element'
[patent_app_type] => utility
[patent_app_number] => 11/250251
[patent_app_country] => US
[patent_app_date] => 2005-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 49
[patent_no_of_words] => 24784
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/525/07525119.pdf
[firstpage_image] =>[orig_patent_app_number] => 11250251
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/250251 | Light emitting display device using thin film transistors and electro-luminescence element | Oct 12, 2005 | Issued |
Array
(
[id] => 5757340
[patent_doc_number] => 20060208285
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-21
[patent_title] => 'Image sensor with embedded photodiode region and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/248320
[patent_app_country] => US
[patent_app_date] => 2005-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 11141
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0208/20060208285.pdf
[firstpage_image] =>[orig_patent_app_number] => 11248320
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/248320 | Image sensor with embedded photodiode region and fabrication method thereof | Oct 12, 2005 | Issued |
Array
(
[id] => 800612
[patent_doc_number] => 07425760
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-09-16
[patent_title] => 'Multi-chip module structure with power delivery using flexible cables'
[patent_app_type] => utility
[patent_app_number] => 11/250100
[patent_app_country] => US
[patent_app_date] => 2005-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4702
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/425/07425760.pdf
[firstpage_image] =>[orig_patent_app_number] => 11250100
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/250100 | Multi-chip module structure with power delivery using flexible cables | Oct 11, 2005 | Issued |
Array
(
[id] => 401497
[patent_doc_number] => 07291863
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-06
[patent_title] => 'Light emitting diode structure'
[patent_app_type] => utility
[patent_app_number] => 11/163220
[patent_app_country] => US
[patent_app_date] => 2005-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4303
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/291/07291863.pdf
[firstpage_image] =>[orig_patent_app_number] => 11163220
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/163220 | Light emitting diode structure | Oct 10, 2005 | Issued |
Array
(
[id] => 282189
[patent_doc_number] => 07554190
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-30
[patent_title] => 'Liquid metal thermal interface material system'
[patent_app_type] => utility
[patent_app_number] => 11/248720
[patent_app_country] => US
[patent_app_date] => 2005-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 27
[patent_no_of_words] => 4813
[patent_no_of_claims] => 72
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/554/07554190.pdf
[firstpage_image] =>[orig_patent_app_number] => 11248720
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/248720 | Liquid metal thermal interface material system | Oct 10, 2005 | Issued |
Array
(
[id] => 5878060
[patent_doc_number] => 20060027866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-09
[patent_title] => 'Method of forming a recessed buried-diffusion device'
[patent_app_type] => utility
[patent_app_number] => 11/248786
[patent_app_country] => US
[patent_app_date] => 2005-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1530
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0027/20060027866.pdf
[firstpage_image] =>[orig_patent_app_number] => 11248786
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/248786 | Method of forming a recessed buried-diffusion device | Oct 10, 2005 | Issued |
Array
(
[id] => 5810817
[patent_doc_number] => 20060081925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-20
[patent_title] => 'Semiconductor device with asymmetric pocket implants'
[patent_app_type] => utility
[patent_app_number] => 11/245377
[patent_app_country] => US
[patent_app_date] => 2005-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 4834
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0081/20060081925.pdf
[firstpage_image] =>[orig_patent_app_number] => 11245377
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/245377 | Semiconductor device with asymmetric pocket implants | Oct 5, 2005 | Issued |
Array
(
[id] => 522208
[patent_doc_number] => 07190034
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-03-13
[patent_title] => 'Semiconductor device capable of avoiding latchup breakdown resulting from negative variation of floating offset voltage'
[patent_app_type] => utility
[patent_app_number] => 11/229724
[patent_app_country] => US
[patent_app_date] => 2005-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 9516
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/190/07190034.pdf
[firstpage_image] =>[orig_patent_app_number] => 11229724
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/229724 | Semiconductor device capable of avoiding latchup breakdown resulting from negative variation of floating offset voltage | Sep 19, 2005 | Issued |
Array
(
[id] => 476596
[patent_doc_number] => 07227233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-06-05
[patent_title] => 'Silicon-on-insulator (SOI) Read Only Memory (ROM) array and method of making a SOI ROM'
[patent_app_type] => utility
[patent_app_number] => 11/162472
[patent_app_country] => US
[patent_app_date] => 2005-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3935
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/227/07227233.pdf
[firstpage_image] =>[orig_patent_app_number] => 11162472
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/162472 | Silicon-on-insulator (SOI) Read Only Memory (ROM) array and method of making a SOI ROM | Sep 11, 2005 | Issued |
Array
(
[id] => 5736019
[patent_doc_number] => 20060006409
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-12
[patent_title] => 'Power semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/221702
[patent_app_country] => US
[patent_app_date] => 2005-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 15820
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20060006409.pdf
[firstpage_image] =>[orig_patent_app_number] => 11221702
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/221702 | Power semiconductor device | Sep 8, 2005 | Issued |
Array
(
[id] => 5145718
[patent_doc_number] => 20070045772
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'FUSE STRUCTURE FOR A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/162150
[patent_app_country] => US
[patent_app_date] => 2005-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4921
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20070045772.pdf
[firstpage_image] =>[orig_patent_app_number] => 11162150
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/162150 | Fuse structure for a semiconductor device | Aug 29, 2005 | Issued |
Array
(
[id] => 443692
[patent_doc_number] => 07256464
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-14
[patent_title] => 'Metal oxide semiconductor transistor and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/162080
[patent_app_country] => US
[patent_app_date] => 2005-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 3967
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/256/07256464.pdf
[firstpage_image] =>[orig_patent_app_number] => 11162080
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/162080 | Metal oxide semiconductor transistor and fabrication method thereof | Aug 28, 2005 | Issued |
Array
(
[id] => 5217467
[patent_doc_number] => 20070158778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'Semiconductor device and module using the same'
[patent_app_type] => utility
[patent_app_number] => 10/588960
[patent_app_country] => US
[patent_app_date] => 2005-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 11002
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20070158778.pdf
[firstpage_image] =>[orig_patent_app_number] => 10588960
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/588960 | Device for implementing an inverter having a reduced size | Aug 25, 2005 | Issued |
Array
(
[id] => 311406
[patent_doc_number] => 07528438
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-05
[patent_title] => 'Non-volatile memory including assist gate'
[patent_app_type] => utility
[patent_app_number] => 11/162035
[patent_app_country] => US
[patent_app_date] => 2005-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5766
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/528/07528438.pdf
[firstpage_image] =>[orig_patent_app_number] => 11162035
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/162035 | Non-volatile memory including assist gate | Aug 25, 2005 | Issued |
Array
(
[id] => 578632
[patent_doc_number] => 07459743
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-02
[patent_title] => 'Dual port gain cell with side and top gated read transistor'
[patent_app_type] => utility
[patent_app_number] => 11/161962
[patent_app_country] => US
[patent_app_date] => 2005-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 24
[patent_no_of_words] => 7689
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/459/07459743.pdf
[firstpage_image] =>[orig_patent_app_number] => 11161962
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/161962 | Dual port gain cell with side and top gated read transistor | Aug 23, 2005 | Issued |