Search

Leo B Tentoni

Examiner (ID: 11342, Phone: (571)272-1209 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1732, 1791, 1742, 1307
Total Applications
4287
Issued Applications
3378
Pending Applications
281
Abandoned Applications
662

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 75256 [patent_doc_number] => 07750436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Electronic device comprising an integrated circuit and a capacitance element' [patent_app_type] => utility [patent_app_number] => 11/632887 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4013 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/750/07750436.pdf [firstpage_image] =>[orig_patent_app_number] => 11632887 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/632887
Electronic device comprising an integrated circuit and a capacitance element Jul 6, 2005 Issued
Array ( [id] => 4992306 [patent_doc_number] => 20070007650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Driver device and display device' [patent_app_type] => utility [patent_app_number] => 11/175320 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8195 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20070007650.pdf [firstpage_image] =>[orig_patent_app_number] => 11175320 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175320
Semiconductor chip mounting arrangement Jul 6, 2005 Issued
Array ( [id] => 5832144 [patent_doc_number] => 20060243974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Thin-film transistor' [patent_app_type] => utility [patent_app_number] => 11/175440 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 2661 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20060243974.pdf [firstpage_image] =>[orig_patent_app_number] => 11175440 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175440
Thin-film transistor Jul 6, 2005 Abandoned
Array ( [id] => 4992233 [patent_doc_number] => 20070007577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Integrated circuit embodying a non-volatile memory cell' [patent_app_type] => utility [patent_app_number] => 11/175688 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3930 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20070007577.pdf [firstpage_image] =>[orig_patent_app_number] => 11175688 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175688
Integrated circuit embodying a non-volatile memory cell Jul 5, 2005 Abandoned
Array ( [id] => 5790834 [patent_doc_number] => 20060011941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Substrate for growing electro-optical single crystal thin film and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/174610 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3114 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20060011941.pdf [firstpage_image] =>[orig_patent_app_number] => 11174610 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/174610
Substrate for growing electro-optical single crystal thin film and method of manufacturing the same Jul 5, 2005 Issued
Array ( [id] => 4992304 [patent_doc_number] => 20070007648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'SEMICONDUCTOR DEVICE PROTECTIVE STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/175420 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20070007648.pdf [firstpage_image] =>[orig_patent_app_number] => 11175420 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175420
Semiconductor device protective structure and method for fabricating the same Jul 5, 2005 Issued
Array ( [id] => 5736040 [patent_doc_number] => 20060006430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-12 [patent_title] => 'Submount substrate for mounting light emitting device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/174640 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4543 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20060006430.pdf [firstpage_image] =>[orig_patent_app_number] => 11174640 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/174640
Submount substrate for mounting light emitting device and method of fabricating the same Jul 5, 2005 Issued
Array ( [id] => 849522 [patent_doc_number] => 07382041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Organic-inorganic composite insulating material for electronic element, method of producing same and field-effect transistor comprising same' [patent_app_type] => utility [patent_app_number] => 11/172980 [patent_app_country] => US [patent_app_date] => 2005-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7034 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/382/07382041.pdf [firstpage_image] =>[orig_patent_app_number] => 11172980 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/172980
Organic-inorganic composite insulating material for electronic element, method of producing same and field-effect transistor comprising same Jul 4, 2005 Issued
Array ( [id] => 844074 [patent_doc_number] => 07388271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Schottky diode with minimal vertical current flow' [patent_app_type] => utility [patent_app_number] => 11/174190 [patent_app_country] => US [patent_app_date] => 2005-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5702 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/388/07388271.pdf [firstpage_image] =>[orig_patent_app_number] => 11174190 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/174190
Schottky diode with minimal vertical current flow Jun 30, 2005 Issued
Array ( [id] => 896308 [patent_doc_number] => 07342294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-11 [patent_title] => 'SOI bipolar transistors with reduced self heating' [patent_app_type] => utility [patent_app_number] => 11/173540 [patent_app_country] => US [patent_app_date] => 2005-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1888 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/342/07342294.pdf [firstpage_image] =>[orig_patent_app_number] => 11173540 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173540
SOI bipolar transistors with reduced self heating Jun 30, 2005 Issued
Array ( [id] => 707589 [patent_doc_number] => 07060549 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-13 [patent_title] => 'SRAM devices utilizing tensile-stressed strain films and methods for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/174400 [patent_app_country] => US [patent_app_date] => 2005-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3654 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/060/07060549.pdf [firstpage_image] =>[orig_patent_app_number] => 11174400 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/174400
SRAM devices utilizing tensile-stressed strain films and methods for fabricating the same Jun 30, 2005 Issued
Array ( [id] => 5138946 [patent_doc_number] => 20070001162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Single transistor memory cell with reduced programming voltages' [patent_app_type] => utility [patent_app_number] => 11/172570 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20070001162.pdf [firstpage_image] =>[orig_patent_app_number] => 11172570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/172570
Single transistor memory cell with reduced programming voltages Jun 29, 2005 Issued
Array ( [id] => 5898385 [patent_doc_number] => 20060043618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/173740 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20060043618.pdf [firstpage_image] =>[orig_patent_app_number] => 11173740 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173740
Semiconductor chip, electrically connections therefor Jun 29, 2005 Issued
Array ( [id] => 5736020 [patent_doc_number] => 20060006410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-12 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/171710 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9124 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20060006410.pdf [firstpage_image] =>[orig_patent_app_number] => 11171710 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/171710
Method of manufacturing a semiconductor memory device including a transistor Jun 29, 2005 Issued
Array ( [id] => 7069691 [patent_doc_number] => 20050245076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'Sealing and protecting integrated circuit bonding pads' [patent_app_type] => utility [patent_app_number] => 11/173289 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3239 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20050245076.pdf [firstpage_image] =>[orig_patent_app_number] => 11173289 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173289
Sealing and protecting integrated circuit bonding pads Jun 29, 2005 Issued
Array ( [id] => 432637 [patent_doc_number] => 07265411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'Non-volatile memory having multiple gate structure' [patent_app_type] => utility [patent_app_number] => 11/172112 [patent_app_country] => US [patent_app_date] => 2005-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6527 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/265/07265411.pdf [firstpage_image] =>[orig_patent_app_number] => 11172112 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/172112
Non-volatile memory having multiple gate structure Jun 28, 2005 Issued
Array ( [id] => 480117 [patent_doc_number] => 07224042 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-29 [patent_title] => 'Integrated circuit wafer with inter-die metal interconnect lines traversing scribe-line boundaries' [patent_app_type] => utility [patent_app_number] => 11/171510 [patent_app_country] => US [patent_app_date] => 2005-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2765 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/224/07224042.pdf [firstpage_image] =>[orig_patent_app_number] => 11171510 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/171510
Integrated circuit wafer with inter-die metal interconnect lines traversing scribe-line boundaries Jun 28, 2005 Issued
Array ( [id] => 774749 [patent_doc_number] => 07002186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'Flat panel display and protection device therefor' [patent_app_type] => utility [patent_app_number] => 11/171310 [patent_app_country] => US [patent_app_date] => 2005-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/002/07002186.pdf [firstpage_image] =>[orig_patent_app_number] => 11171310 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/171310
Flat panel display and protection device therefor Jun 28, 2005 Issued
Array ( [id] => 6929049 [patent_doc_number] => 20050280082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Semiconductor device layout and channeling implant process' [patent_app_type] => utility [patent_app_number] => 11/167640 [patent_app_country] => US [patent_app_date] => 2005-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4863 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20050280082.pdf [firstpage_image] =>[orig_patent_app_number] => 11167640 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/167640
Semiconductor device layout and channeling implant process Jun 26, 2005 Issued
Array ( [id] => 4483711 [patent_doc_number] => 07902029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor' [patent_app_type] => utility [patent_app_number] => 11/166286 [patent_app_country] => US [patent_app_date] => 2005-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 54 [patent_no_of_words] => 13900 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902029.pdf [firstpage_image] =>[orig_patent_app_number] => 11166286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/166286
Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor Jun 22, 2005 Issued
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