Search

Leo B Tentoni

Examiner (ID: 106, Phone: (571)272-1209 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1732, 1307, 1791
Total Applications
4174
Issued Applications
3256
Pending Applications
267
Abandoned Applications
650

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16425085 [patent_doc_number] => 20200350283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/934041 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934041 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934041
Semiconductor package and manufacturing method thereof Jul 20, 2020 Issued
Array ( [id] => 18914428 [patent_doc_number] => 11877433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Storage node contact structure of a memory device [patent_app_type] => utility [patent_app_number] => 16/931397 [patent_app_country] => US [patent_app_date] => 2020-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2714 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16931397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/931397
Storage node contact structure of a memory device Jul 15, 2020 Issued
Array ( [id] => 18277016 [patent_doc_number] => 11615963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Electronic device, electronic module and methods for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/926162 [patent_app_country] => US [patent_app_date] => 2020-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16926162 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/926162
Electronic device, electronic module and methods for fabricating the same Jul 9, 2020 Issued
Array ( [id] => 18555393 [patent_doc_number] => 20230253410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/963369 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16963369 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/963369
Array substrate, manufacturing method thereof, and display panel Jul 8, 2020 Issued
Array ( [id] => 16394479 [patent_doc_number] => 20200335420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => THICK-SILVER LAYER INTERFACE [patent_app_type] => utility [patent_app_number] => 16/917542 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16917542 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/917542
THICK-SILVER LAYER INTERFACE Jun 29, 2020 Pending
Array ( [id] => 16376172 [patent_doc_number] => 20200325014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => Semiconductor Device and Method of Forming MEMS Package [patent_app_type] => utility [patent_app_number] => 16/912902 [patent_app_country] => US [patent_app_date] => 2020-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912902 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912902
Semiconductor device and method of forming MEMS package Jun 25, 2020 Issued
Array ( [id] => 16528832 [patent_doc_number] => 20200402913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => CONNECTING MULTIPLE CHIPS USING AN INTERCONNECT DEVICE [patent_app_type] => utility [patent_app_number] => 16/905766 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905766 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905766
CONNECTING MULTIPLE CHIPS USING AN INTERCONNECT DEVICE Jun 17, 2020 Pending
Array ( [id] => 17424342 [patent_doc_number] => 11257804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Distributed semiconductor die and package architecture [patent_app_type] => utility [patent_app_number] => 16/902123 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 15648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/902123
Distributed semiconductor die and package architecture Jun 14, 2020 Issued
Array ( [id] => 16286217 [patent_doc_number] => 20200279819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => CORELESS ORGANIC PACKAGES WITH EMBEDDED DIE AND MAGNETIC INDUCTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/875417 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875417 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/875417
Coreless organic packages with embedded die and magnetic inductor structures May 14, 2020 Issued
Array ( [id] => 17529881 [patent_doc_number] => 11302579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Composite wafer, semiconductor device and electronic component [patent_app_type] => utility [patent_app_number] => 16/874146 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 57 [patent_no_of_words] => 16756 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/874146
Composite wafer, semiconductor device and electronic component May 13, 2020 Issued
Array ( [id] => 16272234 [patent_doc_number] => 20200273722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/870738 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870738 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870738
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME May 7, 2020 Abandoned
Array ( [id] => 18735728 [patent_doc_number] => 11804469 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Active bridging apparatus [patent_app_type] => utility [patent_app_number] => 16/868701 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16868701 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/868701
Active bridging apparatus May 6, 2020 Issued
Array ( [id] => 17529962 [patent_doc_number] => 11302662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Semiconductor package with air gap and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/864767 [patent_app_country] => US [patent_app_date] => 2020-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7837 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16864767 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/864767
Semiconductor package with air gap and manufacturing method thereof Apr 30, 2020 Issued
Array ( [id] => 17203499 [patent_doc_number] => 20210343594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => MOAT COVERAGE WITH DIELECTRIC FILM FOR DEVICE PASSIVATION AND SINGULATION [patent_app_type] => utility [patent_app_number] => 16/862015 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862015 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862015
Moat coverage with dielectric film for device passivation and singulation Apr 28, 2020 Issued
Array ( [id] => 16241655 [patent_doc_number] => 20200258889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => BIT LINE GATE STRUCTURE OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) [patent_app_type] => utility [patent_app_number] => 16/858729 [patent_app_country] => US [patent_app_date] => 2020-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858729 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/858729
BIT LINE GATE STRUCTURE OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) Apr 26, 2020 Abandoned
Array ( [id] => 18387354 [patent_doc_number] => 11658148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Semiconductor package and a method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/854452 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 11209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854452 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854452
Semiconductor package and a method for manufacturing the same Apr 20, 2020 Issued
Array ( [id] => 16456114 [patent_doc_number] => 20200365540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => METHOD OF SELF-ASSEMBLY WITH A HYBRID MOLECULAR BONDING [patent_app_type] => utility [patent_app_number] => 16/851412 [patent_app_country] => US [patent_app_date] => 2020-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16851412 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/851412
METHOD OF SELF-ASSEMBLY WITH A HYBRID MOLECULAR BONDING Apr 16, 2020 Pending
Array ( [id] => 17818594 [patent_doc_number] => 11424218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/844642 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3614 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844642
Semiconductor package Apr 8, 2020 Issued
Array ( [id] => 17723522 [patent_doc_number] => 20220216244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => ON-CHIP INTEGRATION OF INDIUM TIN OXIDE (ITO) LAYERS FOR OHMIC CONTACT TO BOND PADS [patent_app_type] => utility [patent_app_number] => 17/601914 [patent_app_country] => US [patent_app_date] => 2020-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17601914 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/601914
ON-CHIP INTEGRATION OF INDIUM TIN OXIDE (ITO) LAYERS FOR OHMIC CONTACT TO BOND PADS Apr 3, 2020 Pending
Array ( [id] => 17738092 [patent_doc_number] => 20220223554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/607194 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17607194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/607194
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE Mar 29, 2020 Pending
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