
Leon Radomsky
Examiner (ID: 17658)
| Most Active Art Unit | 1104 |
| Art Unit(s) | 2813, 1763, 1104 |
| Total Applications | 270 |
| Issued Applications | 204 |
| Pending Applications | 8 |
| Abandoned Applications | 58 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3825663
[patent_doc_number] => 05783475
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Method of forming a spacer'
[patent_app_type] => 1
[patent_app_number] => 8/974894
[patent_app_country] => US
[patent_app_date] => 1997-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3698
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/783/05783475.pdf
[firstpage_image] =>[orig_patent_app_number] => 974894
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/974894 | Method of forming a spacer | Nov 19, 1997 | Issued |
Array
(
[id] => 3867653
[patent_doc_number] => 05837590
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'Isolated vertical PNP transistor without required buried layer'
[patent_app_type] => 1
[patent_app_number] => 8/869646
[patent_app_country] => US
[patent_app_date] => 1997-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 3128
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/837/05837590.pdf
[firstpage_image] =>[orig_patent_app_number] => 869646
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/869646 | Isolated vertical PNP transistor without required buried layer | Jun 4, 1997 | Issued |
Array
(
[id] => 3831307
[patent_doc_number] => 05712140
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-27
[patent_title] => 'Method of manufacturing interconnection structure of a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/816201
[patent_app_country] => US
[patent_app_date] => 1997-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 5865
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/712/05712140.pdf
[firstpage_image] =>[orig_patent_app_number] => 816201
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/816201 | Method of manufacturing interconnection structure of a semiconductor device | Mar 24, 1997 | Issued |
Array
(
[id] => 3786119
[patent_doc_number] => 05840615
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Method for forming a ferroelectric material film by the sol-gel method, along with a process for a production of a capacitor and its raw material solution'
[patent_app_type] => 1
[patent_app_number] => 8/810201
[patent_app_country] => US
[patent_app_date] => 1997-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 3792
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/840/05840615.pdf
[firstpage_image] =>[orig_patent_app_number] => 810201
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/810201 | Method for forming a ferroelectric material film by the sol-gel method, along with a process for a production of a capacitor and its raw material solution | Mar 2, 1997 | Issued |
Array
(
[id] => 4011756
[patent_doc_number] => 05879959
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Thin-film transistor structure for liquid crystal display'
[patent_app_type] => 1
[patent_app_number] => 8/785482
[patent_app_country] => US
[patent_app_date] => 1997-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3037
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/879/05879959.pdf
[firstpage_image] =>[orig_patent_app_number] => 785482
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/785482 | Thin-film transistor structure for liquid crystal display | Jan 16, 1997 | Issued |
Array
(
[id] => 3841125
[patent_doc_number] => 05707879
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-13
[patent_title] => 'Neutron detector based on semiconductor materials'
[patent_app_type] => 1
[patent_app_number] => 8/780584
[patent_app_country] => US
[patent_app_date] => 1997-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 14
[patent_no_of_words] => 2732
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/707/05707879.pdf
[firstpage_image] =>[orig_patent_app_number] => 780584
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/780584 | Neutron detector based on semiconductor materials | Jan 7, 1997 | Issued |
Array
(
[id] => 3804548
[patent_doc_number] => 05830789
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'CMOS process forming wells after gate formation'
[patent_app_type] => 1
[patent_app_number] => 8/751464
[patent_app_country] => US
[patent_app_date] => 1996-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 4312
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/830/05830789.pdf
[firstpage_image] =>[orig_patent_app_number] => 751464
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/751464 | CMOS process forming wells after gate formation | Nov 18, 1996 | Issued |
Array
(
[id] => 3773867
[patent_doc_number] => 05817548
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Method for fabricating thin film transistor device'
[patent_app_type] => 1
[patent_app_number] => 8/745284
[patent_app_country] => US
[patent_app_date] => 1996-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 25
[patent_no_of_words] => 7012
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/817/05817548.pdf
[firstpage_image] =>[orig_patent_app_number] => 745284
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/745284 | Method for fabricating thin film transistor device | Nov 7, 1996 | Issued |
Array
(
[id] => 3767835
[patent_doc_number] => 05773318
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-30
[patent_title] => 'In-situ technique for cleaving crystals'
[patent_app_type] => 1
[patent_app_number] => 8/723660
[patent_app_country] => US
[patent_app_date] => 1996-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2957
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 78
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/773/05773318.pdf
[firstpage_image] =>[orig_patent_app_number] => 723660
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/723660 | In-situ technique for cleaving crystals | Oct 29, 1996 | Issued |
Array
(
[id] => 3873148
[patent_doc_number] => 05824586
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-20
[patent_title] => 'Method of manufacturing a raised source/drain MOSFET'
[patent_app_type] => 1
[patent_app_number] => 8/735464
[patent_app_country] => US
[patent_app_date] => 1996-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3133
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/824/05824586.pdf
[firstpage_image] =>[orig_patent_app_number] => 735464
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/735464 | Method of manufacturing a raised source/drain MOSFET | Oct 22, 1996 | Issued |
Array
(
[id] => 3884378
[patent_doc_number] => 05776803
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Manufacture of electronic devices comprising thin-film circuitry on a polymer substrate'
[patent_app_type] => 1
[patent_app_number] => 8/731626
[patent_app_country] => US
[patent_app_date] => 1996-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 8759
[patent_no_of_claims] => 11
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[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/776/05776803.pdf
[firstpage_image] =>[orig_patent_app_number] => 731626
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/731626 | Manufacture of electronic devices comprising thin-film circuitry on a polymer substrate | Oct 14, 1996 | Issued |
Array
(
[id] => 3889031
[patent_doc_number] => 05834345
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'Method of fabricating field effect thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 8/710949
[patent_app_country] => US
[patent_app_date] => 1996-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4361
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/834/05834345.pdf
[firstpage_image] =>[orig_patent_app_number] => 710949
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/710949 | Method of fabricating field effect thin film transistor | Sep 23, 1996 | Issued |
| 08/715266 | MULTI-STEP POLYSILICON DEPOSITION PROCESS FOR BORON PENETRATION INHIBITION | Sep 15, 1996 | Abandoned |
Array
(
[id] => 3808073
[patent_doc_number] => 05811339
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Method of fabricating deep submicron MOSFET with narrow gate length using thermal oxidation of polysilicon'
[patent_app_type] => 1
[patent_app_number] => 8/712148
[patent_app_country] => US
[patent_app_date] => 1996-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2088
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/811/05811339.pdf
[firstpage_image] =>[orig_patent_app_number] => 712148
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/712148 | Method of fabricating deep submicron MOSFET with narrow gate length using thermal oxidation of polysilicon | Sep 10, 1996 | Issued |
Array
(
[id] => 3791236
[patent_doc_number] => 05780318
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Cold electron emitting device and method of manufacturing same'
[patent_app_type] => 1
[patent_app_number] => 8/701866
[patent_app_country] => US
[patent_app_date] => 1996-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3860
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/780/05780318.pdf
[firstpage_image] =>[orig_patent_app_number] => 701866
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/701866 | Cold electron emitting device and method of manufacturing same | Aug 22, 1996 | Issued |
Array
(
[id] => 3849194
[patent_doc_number] => 05766988
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Fabricating method for a thin film transistor with a negatively sloped gate'
[patent_app_type] => 1
[patent_app_number] => 8/690886
[patent_app_country] => US
[patent_app_date] => 1996-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2672
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[pdf_file] => patents/05/766/05766988.pdf
[firstpage_image] =>[orig_patent_app_number] => 690886
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/690886 | Fabricating method for a thin film transistor with a negatively sloped gate | Aug 1, 1996 | Issued |
Array
(
[id] => 4011978
[patent_doc_number] => 05879974
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Method of manufacturing a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/690748
[patent_app_country] => US
[patent_app_date] => 1996-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/879/05879974.pdf
[firstpage_image] =>[orig_patent_app_number] => 690748
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/690748 | Method of manufacturing a semiconductor device | Jul 31, 1996 | Issued |
Array
(
[id] => 3785936
[patent_doc_number] => 05840602
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Methods of forming nonmonocrystalline silicon-on-insulator thin-film transistors'
[patent_app_type] => 1
[patent_app_number] => 8/686242
[patent_app_country] => US
[patent_app_date] => 1996-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/840/05840602.pdf
[firstpage_image] =>[orig_patent_app_number] => 686242
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/686242 | Methods of forming nonmonocrystalline silicon-on-insulator thin-film transistors | Jul 24, 1996 | Issued |
Array
(
[id] => 3767990
[patent_doc_number] => 05773329
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-30
[patent_title] => 'Polysilicon grown by pulsed rapid thermal annealing'
[patent_app_type] => 1
[patent_app_number] => 8/685728
[patent_app_country] => US
[patent_app_date] => 1996-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/05/773/05773329.pdf
[firstpage_image] =>[orig_patent_app_number] => 685728
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/685728 | Polysilicon grown by pulsed rapid thermal annealing | Jul 23, 1996 | Issued |
Array
(
[id] => 3807832
[patent_doc_number] => 05811322
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Method of making a broadband backside illuminated MESFET with collecting microlens'
[patent_app_type] => 1
[patent_app_number] => 8/679880
[patent_app_country] => US
[patent_app_date] => 1996-07-15
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/811/05811322.pdf
[firstpage_image] =>[orig_patent_app_number] => 679880
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/679880 | Method of making a broadband backside illuminated MESFET with collecting microlens | Jul 14, 1996 | Issued |