Search

Leon Radomsky

Examiner (ID: 13067)

Most Active Art Unit
1104
Art Unit(s)
1104, 2813, 1763
Total Applications
270
Issued Applications
204
Pending Applications
8
Abandoned Applications
58

Applications

Application numberTitle of the applicationFiling DateStatus
08/323308 METHOD FOR PRODUCING SILICON THIN-FILM TRANSISTORS WITH ENHANCED FORWARD CURRENT DRIVE Oct 13, 1994 Abandoned
08/320044 METHODS OF FORMING CONDUCTIVE POLYSILICON LINES AND BOTTOM GATED THIN FILM TRANSISTORS, AND CONDUCTIVE POLYSILICON LINES AND THIN FILM TRANSISTORS Oct 6, 1994 Abandoned
Array ( [id] => 3532825 [patent_doc_number] => 05556800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Method of manufacturing a mask read only memory (ROM) for storing multi-value data' [patent_app_type] => 1 [patent_app_number] => 8/312906 [patent_app_country] => US [patent_app_date] => 1994-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 5397 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/556/05556800.pdf [firstpage_image] =>[orig_patent_app_number] => 312906 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/312906
Method of manufacturing a mask read only memory (ROM) for storing multi-value data Sep 29, 1994 Issued
Array ( [id] => 3581775 [patent_doc_number] => 05580829 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Method for minimizing unwanted metallization in periphery die on a multi-site wafer' [patent_app_type] => 1 [patent_app_number] => 8/316440 [patent_app_country] => US [patent_app_date] => 1994-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2655 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/580/05580829.pdf [firstpage_image] =>[orig_patent_app_number] => 316440 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/316440
Method for minimizing unwanted metallization in periphery die on a multi-site wafer Sep 29, 1994 Issued
Array ( [id] => 3847395 [patent_doc_number] => 05719065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-17 [patent_title] => 'Method for manufacturing semiconductor device with removable spacers' [patent_app_type] => 1 [patent_app_number] => 8/313910 [patent_app_country] => US [patent_app_date] => 1994-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 49 [patent_no_of_words] => 10339 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/719/05719065.pdf [firstpage_image] =>[orig_patent_app_number] => 313910 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/313910
Method for manufacturing semiconductor device with removable spacers Sep 27, 1994 Issued
Array ( [id] => 3423925 [patent_doc_number] => 05459106 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-17 [patent_title] => 'Method for manufacturing a semiconductor light emitting device' [patent_app_type] => 1 [patent_app_number] => 8/310088 [patent_app_country] => US [patent_app_date] => 1994-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3148 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/459/05459106.pdf [firstpage_image] =>[orig_patent_app_number] => 310088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/310088
Method for manufacturing a semiconductor light emitting device Sep 21, 1994 Issued
08/310610 ISOLATED VERTICAL PNP TRANSISTOR WITHOUT REQUIRED BURIED LAYER Sep 21, 1994 Abandoned
Array ( [id] => 3458852 [patent_doc_number] => 05441900 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'CMOS latchup suppression by localized minority carrier lifetime reduction' [patent_app_type] => 1 [patent_app_number] => 8/308698 [patent_app_country] => US [patent_app_date] => 1994-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2537 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/441/05441900.pdf [firstpage_image] =>[orig_patent_app_number] => 308698 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/308698
CMOS latchup suppression by localized minority carrier lifetime reduction Sep 18, 1994 Issued
Array ( [id] => 3476355 [patent_doc_number] => 05432126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-11 [patent_title] => 'Fabrication process of compound semiconductor device comprising L-shaped gate electrode' [patent_app_type] => 1 [patent_app_number] => 8/301586 [patent_app_country] => US [patent_app_date] => 1994-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 3202 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/432/05432126.pdf [firstpage_image] =>[orig_patent_app_number] => 301586 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/301586
Fabrication process of compound semiconductor device comprising L-shaped gate electrode Sep 6, 1994 Issued
Array ( [id] => 3581344 [patent_doc_number] => 05580801 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Method for processing a thin film using an energy beam' [patent_app_type] => 1 [patent_app_number] => 8/298440 [patent_app_country] => US [patent_app_date] => 1994-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 24 [patent_no_of_words] => 3948 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/580/05580801.pdf [firstpage_image] =>[orig_patent_app_number] => 298440 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/298440
Method for processing a thin film using an energy beam Aug 29, 1994 Issued
08/295550 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Aug 24, 1994 Abandoned
Array ( [id] => 3589508 [patent_doc_number] => 05496777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'Method of arranging alignment marks' [patent_app_type] => 1 [patent_app_number] => 8/293148 [patent_app_country] => US [patent_app_date] => 1994-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2068 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/496/05496777.pdf [firstpage_image] =>[orig_patent_app_number] => 293148 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/293148
Method of arranging alignment marks Aug 18, 1994 Issued
Array ( [id] => 3690635 [patent_doc_number] => 05604135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-18 [patent_title] => 'Method of forming green light emitting diode in silicon carbide' [patent_app_type] => 1 [patent_app_number] => 8/290020 [patent_app_country] => US [patent_app_date] => 1994-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3634 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/604/05604135.pdf [firstpage_image] =>[orig_patent_app_number] => 290020 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/290020
Method of forming green light emitting diode in silicon carbide Aug 11, 1994 Issued
08/283164 METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING STEP OF FORMING SUPERPOSITION ERROR MEASURING PATTERNS Aug 2, 1994 Abandoned
Array ( [id] => 3551967 [patent_doc_number] => 05492843 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-20 [patent_title] => 'Method of fabricating semiconductor device and method of processing substrate' [patent_app_type] => 1 [patent_app_number] => 8/282598 [patent_app_country] => US [patent_app_date] => 1994-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 67 [patent_no_of_words] => 23740 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/492/05492843.pdf [firstpage_image] =>[orig_patent_app_number] => 282598 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/282598
Method of fabricating semiconductor device and method of processing substrate Jul 28, 1994 Issued
Array ( [id] => 3518861 [patent_doc_number] => 05529937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Process for fabricating thin film transistor' [patent_app_type] => 1 [patent_app_number] => 8/277746 [patent_app_country] => US [patent_app_date] => 1994-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 38 [patent_no_of_words] => 14094 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/529/05529937.pdf [firstpage_image] =>[orig_patent_app_number] => 277746 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/277746
Process for fabricating thin film transistor Jul 19, 1994 Issued
Array ( [id] => 3109463 [patent_doc_number] => 05413962 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-09 [patent_title] => 'Multi-level conductor process in VLSI fabrication utilizing an air bridge' [patent_app_type] => 1 [patent_app_number] => 8/275268 [patent_app_country] => US [patent_app_date] => 1994-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2075 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/413/05413962.pdf [firstpage_image] =>[orig_patent_app_number] => 275268 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/275268
Multi-level conductor process in VLSI fabrication utilizing an air bridge Jul 14, 1994 Issued
08/275426 DRY ETCHING WITH REDUCED DAMAGE TO MOS DEVICE Jul 14, 1994 Abandoned
08/275819 METHOD OF FORMING VIAS FOR MULTILEVEL METALLIZATION Jul 14, 1994 Abandoned
Array ( [id] => 3452999 [patent_doc_number] => 05451529 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Method of making a real time ion implantation metal silicide monitor' [patent_app_type] => 1 [patent_app_number] => 8/270764 [patent_app_country] => US [patent_app_date] => 1994-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2523 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/451/05451529.pdf [firstpage_image] =>[orig_patent_app_number] => 270764 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/270764
Method of making a real time ion implantation metal silicide monitor Jul 4, 1994 Issued
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