
Leonard Chang
Supervisory Patent Examiner (ID: 7771, Phone: (571)270-3691 , Office: P/4166 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 4121, 4100, 2812, 2898 |
| Total Applications | 320 |
| Issued Applications | 197 |
| Pending Applications | 1 |
| Abandoned Applications | 127 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8172679
[patent_doc_number] => 20120108042
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-03
[patent_title] => 'Methods Of Forming Doped Regions In Semiconductor Substrates'
[patent_app_type] => utility
[patent_app_number] => 12/938845
[patent_app_country] => US
[patent_app_date] => 2010-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2634
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20120108042.pdf
[firstpage_image] =>[orig_patent_app_number] => 12938845
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/938845 | Methods of forming doped regions in semiconductor substrates | Nov 2, 2010 | Issued |
Array
(
[id] => 8064701
[patent_doc_number] => 20110244673
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-10-06
[patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH BURIED GATES'
[patent_app_type] => utility
[patent_app_number] => 12/938806
[patent_app_country] => US
[patent_app_date] => 2010-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4286
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0244/20110244673.pdf
[firstpage_image] =>[orig_patent_app_number] => 12938806
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/938806 | Method for fabricating semiconductor device with buried gates | Nov 2, 2010 | Issued |
Array
(
[id] => 5944249
[patent_doc_number] => 20110104869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-05
[patent_title] => 'THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/938642
[patent_app_country] => US
[patent_app_date] => 2010-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 8191
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20110104869.pdf
[firstpage_image] =>[orig_patent_app_number] => 12938642
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/938642 | Three-dimensional semiconductor memory device and method of fabricating the same | Nov 2, 2010 | Issued |
Array
(
[id] => 8421715
[patent_doc_number] => 08278203
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-02
[patent_title] => 'Metal control gate formation in non-volatile storage'
[patent_app_type] => utility
[patent_app_number] => 12/845329
[patent_app_country] => US
[patent_app_date] => 2010-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 34
[patent_no_of_words] => 10170
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12845329
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/845329 | Metal control gate formation in non-volatile storage | Jul 27, 2010 | Issued |
Array
(
[id] => 8340089
[patent_doc_number] => 08242012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-14
[patent_title] => 'Integrated circuit structure incorporating a conductor layer with both top surface and sidewall passivation and a method of forming the integrated circuit structure'
[patent_app_type] => utility
[patent_app_number] => 12/845065
[patent_app_country] => US
[patent_app_date] => 2010-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 36
[patent_no_of_words] => 11407
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 273
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12845065
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/845065 | Integrated circuit structure incorporating a conductor layer with both top surface and sidewall passivation and a method of forming the integrated circuit structure | Jul 27, 2010 | Issued |
Array
(
[id] => 8642564
[patent_doc_number] => 08367549
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-05
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/845481
[patent_app_country] => US
[patent_app_date] => 2010-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4155
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12845481
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/845481 | Method of manufacturing semiconductor device | Jul 27, 2010 | Issued |
Array
(
[id] => 7662864
[patent_doc_number] => 20110312133
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-22
[patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND UNDERFILL AND METHOD OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/818462
[patent_app_country] => US
[patent_app_date] => 2010-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10384
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0312/20110312133.pdf
[firstpage_image] =>[orig_patent_app_number] => 12818462
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/818462 | Integrated circuit packaging system with encapsulation and underfill and method of manufacture thereof | Jun 17, 2010 | Issued |
Array
(
[id] => 6286269
[patent_doc_number] => 20100237494
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-23
[patent_title] => 'PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING PACKAGED MICROELECTRONIC DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/796011
[patent_app_country] => US
[patent_app_date] => 2010-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4824
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0237/20100237494.pdf
[firstpage_image] =>[orig_patent_app_number] => 12796011
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/796011 | Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices | Jun 7, 2010 | Issued |
Array
(
[id] => 8422174
[patent_doc_number] => 08278662
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-02
[patent_title] => 'Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/788367
[patent_app_country] => US
[patent_app_date] => 2010-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 93
[patent_no_of_words] => 24228
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12788367
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/788367 | Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof | May 26, 2010 | Issued |
Array
(
[id] => 7818102
[patent_doc_number] => 20120064722
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'ETCHING SOLUTION AND TRENCH ISOLATION STRUCTURE-FORMATION PROCESS EMPOLYING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/320833
[patent_app_country] => US
[patent_app_date] => 2010-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5086
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0064/20120064722.pdf
[firstpage_image] =>[orig_patent_app_number] => 13320833
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/320833 | Etching solution and trench isolation structure-formation process employing the same | May 23, 2010 | Issued |
Array
(
[id] => 8340021
[patent_doc_number] => 08241943
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-08-14
[patent_title] => 'Sodium doping method and system for shaped CIGS/CIS based thin film solar cells'
[patent_app_type] => utility
[patent_app_number] => 12/774675
[patent_app_country] => US
[patent_app_date] => 2010-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 7234
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12774675
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/774675 | Sodium doping method and system for shaped CIGS/CIS based thin film solar cells | May 4, 2010 | Issued |
Array
(
[id] => 6528546
[patent_doc_number] => 20100203682
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-12
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 12/763729
[patent_app_country] => US
[patent_app_date] => 2010-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3362
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0203/20100203682.pdf
[firstpage_image] =>[orig_patent_app_number] => 12763729
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/763729 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME | Apr 19, 2010 | Abandoned |
Array
(
[id] => 6235469
[patent_doc_number] => 20100267173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-21
[patent_title] => 'Fiber Laser Substrate Processing'
[patent_app_type] => utility
[patent_app_number] => 12/761306
[patent_app_country] => US
[patent_app_date] => 2010-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5559
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0267/20100267173.pdf
[firstpage_image] =>[orig_patent_app_number] => 12761306
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/761306 | Fiber laser substrate processing | Apr 14, 2010 | Issued |
Array
(
[id] => 7510977
[patent_doc_number] => 20110256687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-10-20
[patent_title] => 'Method for Fabricating Through Substrate Microchannels'
[patent_app_type] => utility
[patent_app_number] => 12/761085
[patent_app_country] => US
[patent_app_date] => 2010-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 3268
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20110256687.pdf
[firstpage_image] =>[orig_patent_app_number] => 12761085
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/761085 | Method for fabricating through substrate microchannels | Apr 14, 2010 | Issued |
Array
(
[id] => 8870643
[patent_doc_number] => 08466020
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-18
[patent_title] => 'Method of producing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/321418
[patent_app_country] => US
[patent_app_date] => 2010-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 12103
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 765
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13321418
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/321418 | Method of producing semiconductor device | Apr 5, 2010 | Issued |
Array
(
[id] => 6534390
[patent_doc_number] => 20100270659
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-28
[patent_title] => 'SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND SILANE COUPLING AGENT'
[patent_app_type] => utility
[patent_app_number] => 12/725940
[patent_app_country] => US
[patent_app_date] => 2010-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7264
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0270/20100270659.pdf
[firstpage_image] =>[orig_patent_app_number] => 12725940
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/725940 | Semiconductor device, method of manufacturing the same, and silane coupling agent | Mar 16, 2010 | Issued |
Array
(
[id] => 6015944
[patent_doc_number] => 20110223768
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-15
[patent_title] => 'Method for Forming Contact Opening'
[patent_app_type] => utility
[patent_app_number] => 12/720671
[patent_app_country] => US
[patent_app_date] => 2010-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3081
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0223/20110223768.pdf
[firstpage_image] =>[orig_patent_app_number] => 12720671
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/720671 | Method for Forming Contact Opening | Mar 9, 2010 | Abandoned |
Array
(
[id] => 6560955
[patent_doc_number] => 20100233863
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-16
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/721236
[patent_app_country] => US
[patent_app_date] => 2010-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 16448
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0233/20100233863.pdf
[firstpage_image] =>[orig_patent_app_number] => 12721236
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/721236 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Mar 9, 2010 | Abandoned |
Array
(
[id] => 6015894
[patent_doc_number] => 20110223736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-15
[patent_title] => 'LDD Epitaxy for FinFETs'
[patent_app_type] => utility
[patent_app_number] => 12/720476
[patent_app_country] => US
[patent_app_date] => 2010-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2841
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0223/20110223736.pdf
[firstpage_image] =>[orig_patent_app_number] => 12720476
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/720476 | LDD epitaxy for FinFETs | Mar 8, 2010 | Issued |
Array
(
[id] => 6273908
[patent_doc_number] => 20100255677
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-07
[patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/718175
[patent_app_country] => US
[patent_app_date] => 2010-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6950
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20100255677.pdf
[firstpage_image] =>[orig_patent_app_number] => 12718175
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/718175 | Manufacturing method of semiconductor device | Mar 4, 2010 | Issued |