
Leonard Chang
Supervisory Patent Examiner (ID: 7771, Phone: (571)270-3691 , Office: P/4166 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 4121, 4100, 2812, 2898 |
| Total Applications | 320 |
| Issued Applications | 197 |
| Pending Applications | 1 |
| Abandoned Applications | 127 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8675322
[patent_doc_number] => 08383435
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Integrated photonic semiconductor devices and methods for making integrated photonic semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 12/685802
[patent_app_country] => US
[patent_app_date] => 2010-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 6787
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 405
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12685802
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/685802 | Integrated photonic semiconductor devices and methods for making integrated photonic semiconductor devices | Jan 11, 2010 | Issued |
Array
(
[id] => 6633650
[patent_doc_number] => 20100173470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-08
[patent_title] => 'Methods of forming a silicon oxide layer and methods of forming an isolation layer'
[patent_app_type] => utility
[patent_app_number] => 12/654933
[patent_app_country] => US
[patent_app_date] => 2010-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10566
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20100173470.pdf
[firstpage_image] =>[orig_patent_app_number] => 12654933
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/654933 | Methods of forming a silicon oxide layer and methods of forming an isolation layer | Jan 7, 2010 | Abandoned |
Array
(
[id] => 4639405
[patent_doc_number] => 08017432
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-13
[patent_title] => 'Deposition of amorphous phase change material'
[patent_app_type] => utility
[patent_app_number] => 12/684185
[patent_app_country] => US
[patent_app_date] => 2010-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2131
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/017/08017432.pdf
[firstpage_image] =>[orig_patent_app_number] => 12684185
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/684185 | Deposition of amorphous phase change material | Jan 7, 2010 | Issued |
Array
(
[id] => 6230494
[patent_doc_number] => 20100184269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'METHOD FOR MANUFACTURING SOI SUBSTRATE AND SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/684269
[patent_app_country] => US
[patent_app_date] => 2010-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 21101
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20100184269.pdf
[firstpage_image] =>[orig_patent_app_number] => 12684269
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/684269 | Method for manufacturing SOI substrate and semiconductor device | Jan 7, 2010 | Issued |
Array
(
[id] => 7977421
[patent_doc_number] => 08071457
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-06
[patent_title] => 'Low capacitance precision resistor'
[patent_app_type] => utility
[patent_app_number] => 12/683770
[patent_app_country] => US
[patent_app_date] => 2010-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 1873
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/071/08071457.pdf
[firstpage_image] =>[orig_patent_app_number] => 12683770
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/683770 | Low capacitance precision resistor | Jan 6, 2010 | Issued |
Array
(
[id] => 6633935
[patent_doc_number] => 20100173497
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-08
[patent_title] => 'Method of fabricating semiconductor integrated circuit device'
[patent_app_type] => utility
[patent_app_number] => 12/655837
[patent_app_country] => US
[patent_app_date] => 2010-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6399
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20100173497.pdf
[firstpage_image] =>[orig_patent_app_number] => 12655837
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/655837 | Method of fabricating semiconductor integrated circuit device | Jan 5, 2010 | Abandoned |
Array
(
[id] => 6099048
[patent_doc_number] => 20110163455
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-07
[patent_title] => 'Tunnel Junction Via'
[patent_app_type] => utility
[patent_app_number] => 12/683080
[patent_app_country] => US
[patent_app_date] => 2010-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2083
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0163/20110163455.pdf
[firstpage_image] =>[orig_patent_app_number] => 12683080
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/683080 | Tunnel junction via | Jan 5, 2010 | Issued |
Array
(
[id] => 6230510
[patent_doc_number] => 20100184284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'Method of Manufacturing Semiconductor Memory Device'
[patent_app_type] => utility
[patent_app_number] => 12/648842
[patent_app_country] => US
[patent_app_date] => 2009-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2865
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20100184284.pdf
[firstpage_image] =>[orig_patent_app_number] => 12648842
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/648842 | Method of Manufacturing Semiconductor Memory Device | Dec 28, 2009 | Abandoned |
Array
(
[id] => 6293232
[patent_doc_number] => 20100159696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-24
[patent_title] => 'MICROLENS MASK OF IMAGE SENSOR AND METHOD FOR FORMING MICROLENS USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/644702
[patent_app_country] => US
[patent_app_date] => 2009-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2492
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0159/20100159696.pdf
[firstpage_image] =>[orig_patent_app_number] => 12644702
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/644702 | MICROLENS MASK OF IMAGE SENSOR AND METHOD FOR FORMING MICROLENS USING THE SAME | Dec 21, 2009 | Abandoned |
Array
(
[id] => 7742014
[patent_doc_number] => 08106518
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/640766
[patent_app_country] => US
[patent_app_date] => 2009-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 55
[patent_no_of_words] => 14234
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/106/08106518.pdf
[firstpage_image] =>[orig_patent_app_number] => 12640766
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/640766 | Semiconductor device and method of manufacturing the same | Dec 16, 2009 | Issued |
Array
(
[id] => 6419020
[patent_doc_number] => 20100167475
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-01
[patent_title] => 'SEMICONDUCTOR DEVICE AND PRODUCING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/639561
[patent_app_country] => US
[patent_app_date] => 2009-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4139
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0167/20100167475.pdf
[firstpage_image] =>[orig_patent_app_number] => 12639561
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/639561 | Semiconductor device and producing method thereof | Dec 15, 2009 | Issued |
Array
(
[id] => 6438946
[patent_doc_number] => 20100144146
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-10
[patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/627572
[patent_app_country] => US
[patent_app_date] => 2009-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10626
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0144/20100144146.pdf
[firstpage_image] =>[orig_patent_app_number] => 12627572
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/627572 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE | Nov 29, 2009 | Abandoned |
Array
(
[id] => 8968499
[patent_doc_number] => 08507310
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-08-13
[patent_title] => 'Method for manufacturing thin-film photoelectric conversion device'
[patent_app_type] => utility
[patent_app_number] => 13/129612
[patent_app_country] => US
[patent_app_date] => 2009-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 11184
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13129612
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/129612 | Method for manufacturing thin-film photoelectric conversion device | Nov 19, 2009 | Issued |
Array
(
[id] => 6448534
[patent_doc_number] => 20100105170
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-29
[patent_title] => 'Method for manufacturing a semiconductor device having a heat spreader'
[patent_app_type] => utility
[patent_app_number] => 12/588542
[patent_app_country] => US
[patent_app_date] => 2009-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 5742
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0105/20100105170.pdf
[firstpage_image] =>[orig_patent_app_number] => 12588542
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/588542 | Method for manufacturing a semiconductor device having a heat spreader | Oct 18, 2009 | Abandoned |
Array
(
[id] => 6255238
[patent_doc_number] => 20100029081
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-04
[patent_title] => 'SINGLE SPACER PROCESS FOR MULTIPLYING PITCH BY A FACTOR GREATER THAN TWO AND RELATED INTERMEDIATE IC STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 12/577342
[patent_app_country] => US
[patent_app_date] => 2009-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 37
[patent_no_of_words] => 12006
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0029/20100029081.pdf
[firstpage_image] =>[orig_patent_app_number] => 12577342
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/577342 | Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures | Oct 11, 2009 | Issued |
Array
(
[id] => 6500621
[patent_doc_number] => 20100012858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-21
[patent_title] => 'METHODS FOR FORMING DENSE DIELECTRIC LAYER OVER POROUS DIELECTRICS'
[patent_app_type] => utility
[patent_app_number] => 12/569077
[patent_app_country] => US
[patent_app_date] => 2009-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3858
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20100012858.pdf
[firstpage_image] =>[orig_patent_app_number] => 12569077
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/569077 | Methods for forming dense dielectric layer over porous dielectrics | Sep 28, 2009 | Issued |
Array
(
[id] => 6375192
[patent_doc_number] => 20100081253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-01
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 12/564961
[patent_app_country] => US
[patent_app_date] => 2009-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 19778
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0081/20100081253.pdf
[firstpage_image] =>[orig_patent_app_number] => 12564961
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/564961 | Method for manufacturing semiconductor substrate | Sep 22, 2009 | Issued |
Array
(
[id] => 5461646
[patent_doc_number] => 20090321846
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-31
[patent_title] => 'Method of Forming Fully Silicided NMOS and PMOS Semiconductor Devices Having Independent Polysilicon Gate Thicknesses, and Related Device'
[patent_app_type] => utility
[patent_app_number] => 12/555027
[patent_app_country] => US
[patent_app_date] => 2009-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9889
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0321/20090321846.pdf
[firstpage_image] =>[orig_patent_app_number] => 12555027
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/555027 | Method of Forming Fully Silicided NMOS and PMOS Semiconductor Devices Having Independent Polysilicon Gate Thicknesses, and Related Device | Sep 7, 2009 | Abandoned |
Array
(
[id] => 5971015
[patent_doc_number] => 20110151591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'PHOTOVOLTAIC CELL MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/060573
[patent_app_country] => US
[patent_app_date] => 2009-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5747
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20110151591.pdf
[firstpage_image] =>[orig_patent_app_number] => 13060573
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/060573 | PHOTOVOLTAIC CELL MANUFACTURING METHOD | Aug 18, 2009 | Abandoned |
Array
(
[id] => 5971182
[patent_doc_number] => 20110151643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'METHOD FOR MANUFACTURING BONDED WAFER'
[patent_app_type] => utility
[patent_app_number] => 13/060558
[patent_app_country] => US
[patent_app_date] => 2009-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4008
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20110151643.pdf
[firstpage_image] =>[orig_patent_app_number] => 13060558
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/060558 | METHOD FOR MANUFACTURING BONDED WAFER | Aug 3, 2009 | Abandoned |