Search

Leonard Chang

Supervisory Patent Examiner (ID: 4993, Phone: (571)270-3691 , Office: P/4166 )

Most Active Art Unit
2812
Art Unit(s)
2812, 4121, 4100
Total Applications
318
Issued Applications
195
Pending Applications
1
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8017983 [patent_doc_number] => 08138495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Film stress management for MEMS through selective relaxation' [patent_app_type] => utility [patent_app_number] => 11/968399 [patent_app_country] => US [patent_app_date] => 2008-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 5959 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/138/08138495.pdf [firstpage_image] =>[orig_patent_app_number] => 11968399 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968399
Film stress management for MEMS through selective relaxation Jan 1, 2008 Issued
Array ( [id] => 4749791 [patent_doc_number] => 20080157862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'NOISE CANCELLATION CIRCUIT, ELECTRONIC CIRCUIT, AND NOISE CANCELLATION SIGNAL GENERATION METHOD' [patent_app_type] => utility [patent_app_number] => 11/959105 [patent_app_country] => US [patent_app_date] => 2007-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3518 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20080157862.pdf [firstpage_image] =>[orig_patent_app_number] => 11959105 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/959105
NOISE CANCELLATION CIRCUIT, ELECTRONIC CIRCUIT, AND NOISE CANCELLATION SIGNAL GENERATION METHOD Dec 17, 2007 Abandoned
Array ( [id] => 6563459 [patent_doc_number] => 20100059892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-11 [patent_title] => 'PRODUCTION METHOD OF SEMICONDUCTOR DEVICE, PRODUCTION METHOD OF DISPLAY DEVICE, SEMICONDUCTOR DEVICE, PRODUCTION METHOD OF SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/447821 [patent_app_country] => US [patent_app_date] => 2007-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8577 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20100059892.pdf [firstpage_image] =>[orig_patent_app_number] => 12447821 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/447821
PRODUCTION METHOD OF SEMICONDUCTOR DEVICE, PRODUCTION METHOD OF DISPLAY DEVICE, SEMICONDUCTOR DEVICE, PRODUCTION METHOD OF SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR ELEMENT Dec 13, 2007 Abandoned
Array ( [id] => 5574556 [patent_doc_number] => 20090141917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'Speaker cone protection arrangement' [patent_app_type] => utility [patent_app_number] => 11/999201 [patent_app_country] => US [patent_app_date] => 2007-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10923 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20090141917.pdf [firstpage_image] =>[orig_patent_app_number] => 11999201 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/999201
Speaker cone protection arrangement Dec 3, 2007 Abandoned
Array ( [id] => 4878777 [patent_doc_number] => 20080152160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Methods and apparatus for wireless stereo audio' [patent_app_type] => utility [patent_app_number] => 11/998562 [patent_app_country] => US [patent_app_date] => 2007-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4757 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20080152160.pdf [firstpage_image] =>[orig_patent_app_number] => 11998562 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/998562
Methods and apparatus for wireless stereo audio Nov 29, 2007 Abandoned
Array ( [id] => 6632083 [patent_doc_number] => 20100035378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-11 [patent_title] => 'ETCHING METHOD, PATTERN FORMING PROCESS, THIN-FILM TRANSISTOR FABRICATION PROCESS, AND ETCHING SOLUTION' [patent_app_type] => utility [patent_app_number] => 12/514209 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5479 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20100035378.pdf [firstpage_image] =>[orig_patent_app_number] => 12514209 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/514209
Etching method, pattern forming process, thin-film transistor fabrication process, and etching solution Nov 19, 2007 Issued
Array ( [id] => 4858564 [patent_doc_number] => 20080267414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'VOICE OUTPUTTING APPARATUS AND VOICE OUTPUTTING METHOD' [patent_app_type] => utility [patent_app_number] => 11/928301 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3588 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20080267414.pdf [firstpage_image] =>[orig_patent_app_number] => 11928301 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/928301
VOICE OUTPUTTING APPARATUS AND VOICE OUTPUTTING METHOD Oct 29, 2007 Abandoned
Array ( [id] => 4745767 [patent_doc_number] => 20080090369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/870852 [patent_app_country] => US [patent_app_date] => 2007-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 58 [patent_no_of_words] => 32111 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20080090369.pdf [firstpage_image] =>[orig_patent_app_number] => 11870852 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/870852
Method of manufacturing semiconductor device Oct 10, 2007 Issued
Array ( [id] => 9762135 [patent_doc_number] => 08846456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Method and apparatus for manufacturing an electronic module, and electronic module' [patent_app_type] => utility [patent_app_number] => 12/310539 [patent_app_country] => US [patent_app_date] => 2007-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4180 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12310539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/310539
Method and apparatus for manufacturing an electronic module, and electronic module Aug 28, 2007 Issued
Array ( [id] => 4749011 [patent_doc_number] => 20080157081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'ORGANIC LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/845202 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 61 [patent_no_of_words] => 15852 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20080157081.pdf [firstpage_image] =>[orig_patent_app_number] => 11845202 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845202
ORGANIC LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME Aug 26, 2007 Abandoned
Array ( [id] => 6392331 [patent_doc_number] => 20100163878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'ACTIVE MATRIX DISPLAYS AND OTHER ELECTRONIC DEVICES HAVING PLASTIC SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 12/376980 [patent_app_country] => US [patent_app_date] => 2007-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4755 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20100163878.pdf [firstpage_image] =>[orig_patent_app_number] => 12376980 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/376980
Active matrix displays and other electronic devices having plastic substrates Aug 6, 2007 Issued
Array ( [id] => 5345980 [patent_doc_number] => 20090001341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Phase Change Memory with Tapered Heater' [patent_app_type] => utility [patent_app_number] => 11/771501 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3651 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001341.pdf [firstpage_image] =>[orig_patent_app_number] => 11771501 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771501
Phase change memory with tapered heater Jun 28, 2007 Issued
Array ( [id] => 4654910 [patent_doc_number] => 20080023770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'Stacked semiconductor devices and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/823765 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6627 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20080023770.pdf [firstpage_image] =>[orig_patent_app_number] => 11823765 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/823765
Stacked semiconductor devices and methods of manufacturing the same Jun 27, 2007 Issued
Array ( [id] => 5489266 [patent_doc_number] => 20090290337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'MOUNTING METHOD, MOUNTED STRUCTURE, MANUFACTUREING METHOD FOR ELECTRONIC EQUIPMENT, ELECTRONIC EQUIPMENT, MANUFACTURING METHOD FOR LIGHT-EMITTING DIODE DISPLAY, AND LIGHT-EMITTING DIODE DISPLAY' [patent_app_type] => utility [patent_app_number] => 12/373479 [patent_app_country] => US [patent_app_date] => 2007-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9966 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20090290337.pdf [firstpage_image] =>[orig_patent_app_number] => 12373479 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/373479
Mounting method, mounted structure, manufacturing method for electronic equipment, electronic equipment, manufacturing method for light-emitting diode display, and light-emitting diode display Jun 24, 2007 Issued
Array ( [id] => 9127031 [patent_doc_number] => 08574980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device' [patent_app_type] => utility [patent_app_number] => 11/741551 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 34 [patent_no_of_words] => 9859 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11741551 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741551
Method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device Apr 26, 2007 Issued
Array ( [id] => 5210534 [patent_doc_number] => 20070249118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/736991 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3317 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20070249118.pdf [firstpage_image] =>[orig_patent_app_number] => 11736991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736991
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Apr 17, 2007 Abandoned
Array ( [id] => 111658 [patent_doc_number] => 07718494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Method for forming high-drain-voltage tolerance MOSFET transistor in a CMOS process flow with double well dose approach' [patent_app_type] => utility [patent_app_number] => 11/784721 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3475 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/718/07718494.pdf [firstpage_image] =>[orig_patent_app_number] => 11784721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/784721
Method for forming high-drain-voltage tolerance MOSFET transistor in a CMOS process flow with double well dose approach Apr 8, 2007 Issued
Array ( [id] => 4523246 [patent_doc_number] => 07951683 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-31 [patent_title] => 'In-situ process layer using silicon-rich-oxide for etch selectivity in high AR gapfill' [patent_app_type] => utility [patent_app_number] => 11/697611 [patent_app_country] => US [patent_app_date] => 2007-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 10680 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/951/07951683.pdf [firstpage_image] =>[orig_patent_app_number] => 11697611 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/697611
In-situ process layer using silicon-rich-oxide for etch selectivity in high AR gapfill Apr 5, 2007 Issued
Array ( [id] => 5126039 [patent_doc_number] => 20070238310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A SILICON OXYNITRIDE FILM' [patent_app_type] => utility [patent_app_number] => 11/697082 [patent_app_country] => US [patent_app_date] => 2007-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5694 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20070238310.pdf [firstpage_image] =>[orig_patent_app_number] => 11697082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/697082
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A SILICON OXYNITRIDE FILM Apr 4, 2007 Abandoned
Array ( [id] => 4682400 [patent_doc_number] => 20080248626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'SHALLOW TRENCH ISOLATION SELF-ALIGNED TO TEMPLATED RECRYSTALLIZATION BOUNDARY' [patent_app_type] => utility [patent_app_number] => 11/697102 [patent_app_country] => US [patent_app_date] => 2007-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5503 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20080248626.pdf [firstpage_image] =>[orig_patent_app_number] => 11697102 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/697102
SHALLOW TRENCH ISOLATION SELF-ALIGNED TO TEMPLATED RECRYSTALLIZATION BOUNDARY Apr 4, 2007 Abandoned
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