Search

Leonard R. Leo

Examiner (ID: 112, Phone: (571)272-4916 , Office: P/3744 )

Most Active Art Unit
3744
Art Unit(s)
3743, 3753, 3763, 3785, 3407, 3744
Total Applications
2360
Issued Applications
1424
Pending Applications
79
Abandoned Applications
856

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17833817 [patent_doc_number] => 20220271121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SUPERJUNCTION SEMICONDUCTOR DEVICE HAVING REDUCED SOURCE AREA AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 17/670932 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670932 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670932
Superjunction semiconductor device having reduced source area Feb 13, 2022 Issued
Array ( [id] => 19796239 [patent_doc_number] => 12237208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Semiconductor device including device isolation layer with multiple patterns [patent_app_type] => utility [patent_app_number] => 17/668452 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 10671 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668452 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/668452
Semiconductor device including device isolation layer with multiple patterns Feb 9, 2022 Issued
Array ( [id] => 19972437 [patent_doc_number] => 12341058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Air gap through at least two metal layers [patent_app_type] => utility [patent_app_number] => 17/649954 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 2170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649954 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649954
Air gap through at least two metal layers Feb 3, 2022 Issued
Array ( [id] => 18196198 [patent_doc_number] => 20230049717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => NITRIDE SEMICONDUCTOR, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR [patent_app_type] => utility [patent_app_number] => 17/649565 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649565 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649565
Nitride semiconductor including multi-portion nitride region Jan 31, 2022 Issued
Array ( [id] => 18540972 [patent_doc_number] => 20230246084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE INCLUDING HAMMERHEAD-SHAPED WORD LINES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/587470 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587470 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/587470
Three-dimensional memory device including vertical stack of tubular graded silicon oxynitride portions Jan 27, 2022 Issued
Array ( [id] => 18533376 [patent_doc_number] => 20230238452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => FIN ON SILICON ON INSULATOR AND INTEGRATION SCHEMES [patent_app_type] => utility [patent_app_number] => 17/649184 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649184 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649184
Fin on silicon-on-insulator Jan 26, 2022 Issued
Array ( [id] => 17599444 [patent_doc_number] => 20220149018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => DISPLAY DEVICE HAVING MULTIPLE SUB-PIXELS [patent_app_type] => utility [patent_app_number] => 17/585572 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17585572 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/585572
Display device having multiple sub-pixels Jan 26, 2022 Issued
Array ( [id] => 19888371 [patent_doc_number] => 12274120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Display apparatus including capping layer [patent_app_type] => utility [patent_app_number] => 17/586306 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17586306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/586306
Display apparatus including capping layer Jan 26, 2022 Issued
Array ( [id] => 17780392 [patent_doc_number] => 20220246742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => GATE ALL AROUND DEVICE WITH FULLY-DEPLETED SILICON-ON-INSULATOR [patent_app_type] => utility [patent_app_number] => 17/583355 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583355 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583355
Gate all around device with fully-depleted silicon-on-insulator Jan 24, 2022 Issued
Array ( [id] => 20163019 [patent_doc_number] => 12389676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Cooling device semiconductor device including end curved interconnection lines [patent_app_type] => utility [patent_app_number] => 17/576279 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 38 [patent_no_of_words] => 11361 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576279 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/576279
Cooling device semiconductor device including end curved interconnection lines Jan 13, 2022 Issued
Array ( [id] => 19943630 [patent_doc_number] => 12315766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Semiconductor device including spacer layer contacting bit line bottom sidewalls [patent_app_type] => utility [patent_app_number] => 17/563779 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17563779 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/563779
Semiconductor device including spacer layer contacting bit line bottom sidewalls Dec 27, 2021 Issued
Array ( [id] => 20205678 [patent_doc_number] => 12408475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Interconnected electrode structure having multi-conductive through hole and method of manufacturing same [patent_app_type] => utility [patent_app_number] => 18/265265 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2456 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18265265 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/265265
Interconnected electrode structure having multi-conductive through hole and method of manufacturing same Dec 26, 2021 Issued
Array ( [id] => 17523108 [patent_doc_number] => 20220108957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER [patent_app_type] => utility [patent_app_number] => 17/555222 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555222
Microelectronic device with embedded die substrate on interposer Dec 16, 2021 Issued
Array ( [id] => 17993641 [patent_doc_number] => 20220359678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/552446 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552446 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552446
Semiconductor including active contact buried portions Dec 15, 2021 Issued
Array ( [id] => 18442236 [patent_doc_number] => 20230189532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => MEMORY CELL, MEMORY CELL ARRANGEMENT, AND METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 17/548896 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548896
Memory cell including spontaneously polarizable capacitor structure Dec 12, 2021 Issued
Array ( [id] => 18440148 [patent_doc_number] => 20230187443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => NANOSHEET DEVICE WITH VERTICAL BLOCKER FIN [patent_app_type] => utility [patent_app_number] => 17/548913 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548913 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548913
NANOSHEET DEVICE WITH VERTICAL BLOCKER FIN Dec 12, 2021 Pending
Array ( [id] => 18564771 [patent_doc_number] => 11730042 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Display device including wirings electrically connecting oxide conductive layer and sensor electrode [patent_app_type] => utility [patent_app_number] => 17/545002 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6710 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545002 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545002
Display device including wirings electrically connecting oxide conductive layer and sensor electrode Dec 7, 2021 Issued
Array ( [id] => 17477622 [patent_doc_number] => 20220085126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => FLEXIBLE LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING FLEXIBLE-LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/532302 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17532302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/532302
Flexible light-emitting device and EL module including transparent conductive film Nov 21, 2021 Issued
Array ( [id] => 18062035 [patent_doc_number] => 20220393122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => Display Substrate and Preparation Method thereof, and Display Apparatus [patent_app_type] => utility [patent_app_number] => 17/798896 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17798896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/798896
Display Substrate and Preparation Method thereof, and Display Apparatus Nov 18, 2021 Pending
Array ( [id] => 17599529 [patent_doc_number] => 20220149103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => SOLID-STATE IMAGE-CAPTURING ELEMENT AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/530046 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/530046
SOLID-STATE IMAGE-CAPTURING ELEMENT AND ELECTRONIC DEVICE Nov 17, 2021 Abandoned
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