Search

Leslie C. Pascal

Examiner (ID: 18581)

Most Active Art Unit
2613
Art Unit(s)
2874, 2616, 2613, 2637, 2612, 2607, 2733, 2883, 2603, 2636, 2608, 2606, 2633
Total Applications
2250
Issued Applications
1890
Pending Applications
78
Abandoned Applications
293

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14996871 [patent_doc_number] => 20190317393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => MASK AND METHOD OF FORMING PATTERN [patent_app_type] => utility [patent_app_number] => 15/978215 [patent_app_country] => US [patent_app_date] => 2018-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15978215 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/978215
Mask and method of forming pattern May 13, 2018 Issued
Array ( [id] => 15578751 [patent_doc_number] => 10579762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => High-level synthesis (HLS) method and apparatus to specify pipeline and spatial parallelism in computer hardware [patent_app_type] => utility [patent_app_number] => 15/977874 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7474 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977874 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/977874
High-level synthesis (HLS) method and apparatus to specify pipeline and spatial parallelism in computer hardware May 10, 2018 Issued
Array ( [id] => 15962007 [patent_doc_number] => 20200164755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => A VEHICLE CHARGING STATION [patent_app_type] => utility [patent_app_number] => 16/612354 [patent_app_country] => US [patent_app_date] => 2018-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16612354 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/612354
Vehicle charging station May 7, 2018 Issued
Array ( [id] => 15918587 [patent_doc_number] => 10656530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Application of FreeForm MRC to SRAF optimization based on ILT mask optimization [patent_app_type] => utility [patent_app_number] => 15/973809 [patent_app_country] => US [patent_app_date] => 2018-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 14116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973809 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973809
Application of FreeForm MRC to SRAF optimization based on ILT mask optimization May 7, 2018 Issued
Array ( [id] => 14106017 [patent_doc_number] => 20190094684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => CRITICAL DIMENSION MEASUREMENT SYSTEM AND METHOD OF MEASURING CRITICAL DIMENSIONS USING SAME [patent_app_type] => utility [patent_app_number] => 15/973912 [patent_app_country] => US [patent_app_date] => 2018-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973912 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973912
Critical dimension measurement system and method of measuring critical dimensions using same May 7, 2018 Issued
Array ( [id] => 13393733 [patent_doc_number] => 20180248409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => Integrated Circuit for Managing Wireless Power Transmitting Devices [patent_app_type] => utility [patent_app_number] => 15/963959 [patent_app_country] => US [patent_app_date] => 2018-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15963959 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/963959
Integrated circuit for managing wireless power transmitting devices Apr 25, 2018 Issued
Array ( [id] => 16716342 [patent_doc_number] => 20210083489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => CHARGING CIRCUIT AND CHARGING METHOD [patent_app_type] => utility [patent_app_number] => 16/603233 [patent_app_country] => US [patent_app_date] => 2018-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3944 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16603233 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/603233
CHARGING CIRCUIT AND CHARGING METHOD Apr 7, 2018 Abandoned
Array ( [id] => 14935767 [patent_doc_number] => 20190303521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => DOCUMENT IMPLEMENTATION TOOL FOR PCB REFINEMENT [patent_app_type] => utility [patent_app_number] => 15/943793 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943793 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943793
Document implementation tool for PCB refinement Apr 2, 2018 Issued
Array ( [id] => 14935769 [patent_doc_number] => 20190303522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => DOCUMENT IMPLEMENTATION TOOL FOR PCB REFINEMENT [patent_app_type] => utility [patent_app_number] => 15/943796 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943796 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943796
Document implementation tool for PCB refinement Apr 2, 2018 Issued
Array ( [id] => 15399619 [patent_doc_number] => 10540467 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-21 [patent_title] => System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design [patent_app_type] => utility [patent_app_number] => 15/943819 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943819 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943819
System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design Apr 2, 2018 Issued
Array ( [id] => 13421035 [patent_doc_number] => 20180262060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => Methods of Selectively Activating Antenna Zones of a Near-Field Charging Pad to Maximize Wireless Power Delivered to a Receiver [patent_app_type] => utility [patent_app_number] => 15/943559 [patent_app_country] => US [patent_app_date] => 2018-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943559 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943559
Methods of selectively activating antenna zones of a near-field charging pad to maximize wireless power delivered to a receiver Apr 1, 2018 Issued
Array ( [id] => 16323333 [patent_doc_number] => 10783299 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-22 [patent_title] => Simulation event reduction and power control during MBIST through clock tree management [patent_app_type] => utility [patent_app_number] => 15/936999 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15936999 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/936999
Simulation event reduction and power control during MBIST through clock tree management Mar 26, 2018 Issued
Array ( [id] => 13467881 [patent_doc_number] => 20180285483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => DEVICE AND METHOD FOR DETECTING POINTS OF FAILURES [patent_app_type] => utility [patent_app_number] => 15/937153 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937153 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937153
Device and method for detecting points of failures Mar 26, 2018 Issued
Array ( [id] => 14203353 [patent_doc_number] => 10268794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Editing a NoC topology on top of a floorplan [patent_app_type] => utility [patent_app_number] => 15/936350 [patent_app_country] => US [patent_app_date] => 2018-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 4727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15936350 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/936350
Editing a NoC topology on top of a floorplan Mar 25, 2018 Issued
Array ( [id] => 14379897 [patent_doc_number] => 20190163861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => INTEGRATED DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 15/933785 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933785
Integrated device and method of forming the same Mar 22, 2018 Issued
Array ( [id] => 13627633 [patent_doc_number] => 20180365368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => INTEGRATED CIRCUIT INCLUDING STANDARD CELLS OVERLAPPING EACH OTHER AND METHOD OF GENERATING LAYOUT OF THE INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/933958 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933958 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933958
Integrated circuit including standard cells overlapping each other and method of generating layout of the integrated circuit Mar 22, 2018 Issued
Array ( [id] => 17623700 [patent_doc_number] => 11342767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Multi-voltage charging terminal access port [patent_app_type] => utility [patent_app_number] => 16/981920 [patent_app_country] => US [patent_app_date] => 2018-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 6078 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16981920 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/981920
Multi-voltage charging terminal access port Mar 20, 2018 Issued
Array ( [id] => 16045543 [patent_doc_number] => 10684642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Adaptive clock mesh wiring [patent_app_type] => utility [patent_app_number] => 15/925987 [patent_app_country] => US [patent_app_date] => 2018-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 14633 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15925987 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/925987
Adaptive clock mesh wiring Mar 19, 2018 Issued
Array ( [id] => 15444037 [patent_doc_number] => 20200036202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => PIECE OF FURNITURE AND ELECTROMOTIVE FURNITURE DRIVE COMPRISING A CHARGING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/491412 [patent_app_country] => US [patent_app_date] => 2018-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16491412 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/491412
Piece of furniture and electromotive furniture drive comprising a charging apparatus Mar 5, 2018 Issued
Array ( [id] => 14107753 [patent_doc_number] => 20190095552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => Metal Cut Optimization for Standard Cells [patent_app_type] => utility [patent_app_number] => 15/907689 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7481 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907689 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/907689
Metal cut optimization for standard cells Feb 27, 2018 Issued
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