
Leslie Pilar Cruz
Examiner (ID: 15251, Phone: (571)272-8599 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826 |
| Total Applications | 538 |
| Issued Applications | 372 |
| Pending Applications | 2 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11539456
[patent_doc_number] => 09613871
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-04
[patent_title] => 'Semiconductor device and fabricating method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/801332
[patent_app_country] => US
[patent_app_date] => 2015-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 32
[patent_no_of_words] => 11923
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14801332
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/801332 | Semiconductor device and fabricating method thereof | Jul 15, 2015 | Issued |
Array
(
[id] => 11397966
[patent_doc_number] => 20170018503
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-19
[patent_title] => 'SEMICONDUCTOR DIE WITH A METAL VIA'
[patent_app_type] => utility
[patent_app_number] => 14/798535
[patent_app_country] => US
[patent_app_date] => 2015-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3986
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14798535
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/798535 | Semiconductor die with a metal via | Jul 13, 2015 | Issued |
Array
(
[id] => 11398117
[patent_doc_number] => 20170018654
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-19
[patent_title] => 'THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/798744
[patent_app_country] => US
[patent_app_date] => 2015-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2386
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14798744
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/798744 | THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF | Jul 13, 2015 | Abandoned |
Array
(
[id] => 11246610
[patent_doc_number] => 09472661
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-10-18
[patent_title] => 'Semiconductor structure'
[patent_app_type] => utility
[patent_app_number] => 14/798948
[patent_app_country] => US
[patent_app_date] => 2015-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2551
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14798948
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/798948 | Semiconductor structure | Jul 13, 2015 | Issued |
Array
(
[id] => 11925710
[patent_doc_number] => 09793300
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-17
[patent_title] => 'Thin film transistor and circuit structure'
[patent_app_type] => utility
[patent_app_number] => 14/900960
[patent_app_country] => US
[patent_app_date] => 2015-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 6902
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 266
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14900960
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/900960 | Thin film transistor and circuit structure | Jun 18, 2015 | Issued |
Array
(
[id] => 11660220
[patent_doc_number] => 09673232
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-06
[patent_title] => 'Thin-film transistor, active matrix substrate, method of manufacturing thin-film transistor, and method of manufacturing active matrix substrate'
[patent_app_type] => utility
[patent_app_number] => 14/733670
[patent_app_country] => US
[patent_app_date] => 2015-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 9824
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14733670
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/733670 | Thin-film transistor, active matrix substrate, method of manufacturing thin-film transistor, and method of manufacturing active matrix substrate | Jun 7, 2015 | Issued |
Array
(
[id] => 11246559
[patent_doc_number] => 09472610
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-10-18
[patent_title] => 'Substrate'
[patent_app_type] => utility
[patent_app_number] => 14/733559
[patent_app_country] => US
[patent_app_date] => 2015-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4340
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14733559
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/733559 | Substrate | Jun 7, 2015 | Issued |
Array
(
[id] => 10659672
[patent_doc_number] => 20160005816
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-07
[patent_title] => 'Group III-V Transistor with Voltage Controlled Substrate'
[patent_app_type] => utility
[patent_app_number] => 14/733426
[patent_app_country] => US
[patent_app_date] => 2015-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7985
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14733426
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/733426 | Group III-V Transistor with Voltage Controlled Substrate | Jun 7, 2015 | Abandoned |
Array
(
[id] => 10780103
[patent_doc_number] => 20160126258
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-05
[patent_title] => 'LOW TEMPERATURE POLY-SILICON ARRAY SUBSTRATE AND FORMING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/733797
[patent_app_country] => US
[patent_app_date] => 2015-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 6858
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14733797
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/733797 | Low temperature poly-silicon array substrate and forming method thereof | Jun 7, 2015 | Issued |
Array
(
[id] => 10479594
[patent_doc_number] => 20150364610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/733081
[patent_app_country] => US
[patent_app_date] => 2015-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 31988
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14733081
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/733081 | Semiconductor device and electronic device including the semiconductor device | Jun 7, 2015 | Issued |
Array
(
[id] => 10479571
[patent_doc_number] => 20150364587
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'SEMICONDUCTOR DEVICE AND AN ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/732546
[patent_app_country] => US
[patent_app_date] => 2015-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 40
[patent_no_of_words] => 29307
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14732546
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/732546 | Semiconductor device and an electronic device | Jun 4, 2015 | Issued |
Array
(
[id] => 11660214
[patent_doc_number] => 09673226
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-06
[patent_title] => 'Thin film transistor array substrate, display panel and display device'
[patent_app_type] => utility
[patent_app_number] => 14/731427
[patent_app_country] => US
[patent_app_date] => 2015-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 24
[patent_no_of_words] => 7769
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 367
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14731427
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/731427 | Thin film transistor array substrate, display panel and display device | Jun 4, 2015 | Issued |
Array
(
[id] => 10472441
[patent_doc_number] => 20150357457
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-10
[patent_title] => 'SCHOTTKY GATED TRANSISTOR WITH INTERFACIAL LAYER'
[patent_app_type] => utility
[patent_app_number] => 14/731736
[patent_app_country] => US
[patent_app_date] => 2015-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2704
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14731736
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/731736 | Schottky gated transistor with interfacial layer | Jun 4, 2015 | Issued |
Array
(
[id] => 11817942
[patent_doc_number] => 09721899
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-01
[patent_title] => 'Embedded component package structure and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 14/732529
[patent_app_country] => US
[patent_app_date] => 2015-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 44
[patent_no_of_words] => 12349
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14732529
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/732529 | Embedded component package structure and method of manufacturing the same | Jun 4, 2015 | Issued |
Array
(
[id] => 10385298
[patent_doc_number] => 20150270305
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-24
[patent_title] => 'SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/730563
[patent_app_country] => US
[patent_app_date] => 2015-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 21170
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14730563
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/730563 | Solid-state imaging device and method for manufacturing the same | Jun 3, 2015 | Issued |
Array
(
[id] => 11787714
[patent_doc_number] => 09397180
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-07-19
[patent_title] => 'Low resistance sinker contact'
[patent_app_type] => utility
[patent_app_number] => 14/695290
[patent_app_country] => US
[patent_app_date] => 2015-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2897
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14695290
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/695290 | Low resistance sinker contact | Apr 23, 2015 | Issued |
Array
(
[id] => 11118062
[patent_doc_number] => 20160315036
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-27
[patent_title] => 'DUAL TRANSISTORS FABRICATED ON LEAD FRAMES AND METHOD OF FABRICATION'
[patent_app_type] => utility
[patent_app_number] => 14/695333
[patent_app_country] => US
[patent_app_date] => 2015-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2915
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14695333
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/695333 | DUAL TRANSISTORS FABRICATED ON LEAD FRAMES AND METHOD OF FABRICATION | Apr 23, 2015 | Abandoned |
Array
(
[id] => 11118187
[patent_doc_number] => 20160315161
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-27
[patent_title] => 'SEMICONDUCTOR DEVICE WITH A P-N JUNCTION FOR REDUCED CHARGE LEAKAGE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/694325
[patent_app_country] => US
[patent_app_date] => 2015-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8212
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14694325
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/694325 | Semiconductor device with a P-N junction for reduced charge leakage and method of manufacturing the same | Apr 22, 2015 | Issued |
Array
(
[id] => 11071346
[patent_doc_number] => 20160268311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-15
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/693886
[patent_app_country] => US
[patent_app_date] => 2015-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2261
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14693886
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/693886 | Semiconductor device and method for fabricating the same | Apr 22, 2015 | Issued |
Array
(
[id] => 10624549
[patent_doc_number] => 09343499
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-05-17
[patent_title] => 'Integrated circuit stack with strengthened wafer bonding'
[patent_app_type] => utility
[patent_app_number] => 14/694813
[patent_app_country] => US
[patent_app_date] => 2015-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2847
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14694813
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/694813 | Integrated circuit stack with strengthened wafer bonding | Apr 22, 2015 | Issued |