
Leslie Pilar Cruz
Examiner (ID: 15251, Phone: (571)272-8599 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826 |
| Total Applications | 538 |
| Issued Applications | 372 |
| Pending Applications | 2 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 814010
[patent_doc_number] => 07414285
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-19
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/870793
[patent_app_country] => US
[patent_app_date] => 2007-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 31
[patent_no_of_words] => 17021
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/414/07414285.pdf
[firstpage_image] =>[orig_patent_app_number] => 11870793
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/870793 | Nonvolatile semiconductor memory device | Oct 10, 2007 | Issued |
Array
(
[id] => 4685642
[patent_doc_number] => 20080029823
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-07
[patent_title] => 'Semiconductor Device Having a Dual Stress Liner and Light Exposure Apparatus for Forming the Dual Stress Liner'
[patent_app_type] => utility
[patent_app_number] => 11/870573
[patent_app_country] => US
[patent_app_date] => 2007-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5934
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0029/20080029823.pdf
[firstpage_image] =>[orig_patent_app_number] => 11870573
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/870573 | Semiconductor Device Having a Dual Stress Liner and Light Exposure Apparatus for Forming the Dual Stress Liner | Oct 10, 2007 | Abandoned |
Array
(
[id] => 7796257
[patent_doc_number] => 08124965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-28
[patent_title] => 'Opto-electrical devices and methods of making the same'
[patent_app_type] => utility
[patent_app_number] => 12/444102
[patent_app_country] => US
[patent_app_date] => 2007-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 7430
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/124/08124965.pdf
[firstpage_image] =>[orig_patent_app_number] => 12444102
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/444102 | Opto-electrical devices and methods of making the same | Oct 8, 2007 | Issued |
Array
(
[id] => 7535607
[patent_doc_number] => 08049234
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-01
[patent_title] => 'Light emitting devices with improved light extraction efficiency'
[patent_app_type] => utility
[patent_app_number] => 11/868903
[patent_app_country] => US
[patent_app_date] => 2007-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 7405
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/049/08049234.pdf
[firstpage_image] =>[orig_patent_app_number] => 11868903
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/868903 | Light emitting devices with improved light extraction efficiency | Oct 7, 2007 | Issued |
Array
(
[id] => 160107
[patent_doc_number] => 07675121
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-09
[patent_title] => 'SOI substrate contact with extended silicide area'
[patent_app_type] => utility
[patent_app_number] => 11/868564
[patent_app_country] => US
[patent_app_date] => 2007-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 4770
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 276
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/675/07675121.pdf
[firstpage_image] =>[orig_patent_app_number] => 11868564
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/868564 | SOI substrate contact with extended silicide area | Oct 7, 2007 | Issued |
Array
(
[id] => 5439299
[patent_doc_number] => 20090090938
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-09
[patent_title] => 'CHANNEL STRESS ENGINEERING USING LOCALIZED ION IMPLANTATION INDUCED GATE ELECTRODE VOLUMETRIC CHANGE'
[patent_app_type] => utility
[patent_app_number] => 11/867264
[patent_app_country] => US
[patent_app_date] => 2007-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5288
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0090/20090090938.pdf
[firstpage_image] =>[orig_patent_app_number] => 11867264
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/867264 | Channel stress engineering using localized ion implantation induced gate electrode volumetric change | Oct 3, 2007 | Issued |
Array
(
[id] => 4685604
[patent_doc_number] => 20080029785
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-07
[patent_title] => 'Post passivation interconnection schemes on top of the IC chips'
[patent_app_type] => utility
[patent_app_number] => 11/906833
[patent_app_country] => US
[patent_app_date] => 2007-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7320
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0029/20080029785.pdf
[firstpage_image] =>[orig_patent_app_number] => 11906833
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/906833 | Post passivation interconnection schemes on top of the IC chips | Oct 3, 2007 | Issued |
Array
(
[id] => 4849571
[patent_doc_number] => 20080315313
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-25
[patent_title] => 'SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SAME AND METHOD OF DESIGNING SAME'
[patent_app_type] => utility
[patent_app_number] => 11/866693
[patent_app_country] => US
[patent_app_date] => 2007-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 60
[patent_figures_cnt] => 60
[patent_no_of_words] => 27410
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0315/20080315313.pdf
[firstpage_image] =>[orig_patent_app_number] => 11866693
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/866693 | Semiconductor device, method of manufacturing same and method of designing same | Oct 2, 2007 | Issued |
Array
(
[id] => 5425841
[patent_doc_number] => 20090085151
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-02
[patent_title] => 'SEMICONDUCTOR FUSE STRUCTURE AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 11/863814
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2608
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0085/20090085151.pdf
[firstpage_image] =>[orig_patent_app_number] => 11863814
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/863814 | SEMICONDUCTOR FUSE STRUCTURE AND METHOD | Sep 27, 2007 | Abandoned |
Array
(
[id] => 4479650
[patent_doc_number] => 07906826
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-15
[patent_title] => 'Many million pixel image sensor'
[patent_app_type] => utility
[patent_app_number] => 11/904782
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 12375
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/906/07906826.pdf
[firstpage_image] =>[orig_patent_app_number] => 11904782
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/904782 | Many million pixel image sensor | Sep 27, 2007 | Issued |
Array
(
[id] => 82821
[patent_doc_number] => 07745890
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-29
[patent_title] => 'Hybrid metal fully silicided (FUSI) gate'
[patent_app_type] => utility
[patent_app_number] => 11/863804
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 30
[patent_no_of_words] => 3788
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/745/07745890.pdf
[firstpage_image] =>[orig_patent_app_number] => 11863804
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/863804 | Hybrid metal fully silicided (FUSI) gate | Sep 27, 2007 | Issued |
Array
(
[id] => 9047244
[patent_doc_number] => 08541798
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-24
[patent_title] => 'Semiconductor light emitting device, and backlight and display device comprising the semiconductor light emitting device'
[patent_app_type] => utility
[patent_app_number] => 12/442335
[patent_app_country] => US
[patent_app_date] => 2007-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 6702
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12442335
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/442335 | Semiconductor light emitting device, and backlight and display device comprising the semiconductor light emitting device | Sep 26, 2007 | Issued |
Array
(
[id] => 6501687
[patent_doc_number] => 20100012955
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-21
[patent_title] => 'Light-Emitting Diode Arrangement and Method for Producing the Same'
[patent_app_type] => utility
[patent_app_number] => 12/442411
[patent_app_country] => US
[patent_app_date] => 2007-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10619
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20100012955.pdf
[firstpage_image] =>[orig_patent_app_number] => 12442411
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/442411 | Light-emitting diode arrangement and method for producing the same | Sep 24, 2007 | Issued |
Array
(
[id] => 570578
[patent_doc_number] => 07465989
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-16
[patent_title] => 'High withstand voltage trenched MOS transistor and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/902583
[patent_app_country] => US
[patent_app_date] => 2007-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 21
[patent_no_of_words] => 7926
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/465/07465989.pdf
[firstpage_image] =>[orig_patent_app_number] => 11902583
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/902583 | High withstand voltage trenched MOS transistor and manufacturing method thereof | Sep 23, 2007 | Issued |
Array
(
[id] => 7551116
[patent_doc_number] => 08063450
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-22
[patent_title] => 'Assembly of nanoscaled field effect transistors'
[patent_app_type] => utility
[patent_app_number] => 12/441220
[patent_app_country] => US
[patent_app_date] => 2007-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 6174
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/063/08063450.pdf
[firstpage_image] =>[orig_patent_app_number] => 12441220
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/441220 | Assembly of nanoscaled field effect transistors | Sep 18, 2007 | Issued |
Array
(
[id] => 7555876
[patent_doc_number] => 08067778
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-29
[patent_title] => 'Ultraviolet light emitting diode package'
[patent_app_type] => utility
[patent_app_number] => 12/443380
[patent_app_country] => US
[patent_app_date] => 2007-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 20
[patent_no_of_words] => 8644
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/067/08067778.pdf
[firstpage_image] =>[orig_patent_app_number] => 12443380
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/443380 | Ultraviolet light emitting diode package | Sep 17, 2007 | Issued |
Array
(
[id] => 7801465
[patent_doc_number] => 08129737
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-06
[patent_title] => 'Optoelectronic component'
[patent_app_type] => utility
[patent_app_number] => 12/442589
[patent_app_country] => US
[patent_app_date] => 2007-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2752
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/129/08129737.pdf
[firstpage_image] =>[orig_patent_app_number] => 12442589
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/442589 | Optoelectronic component | Sep 16, 2007 | Issued |
Array
(
[id] => 5268637
[patent_doc_number] => 20090072412
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-19
[patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE ENCAPSULATION HAVING RECESS'
[patent_app_type] => utility
[patent_app_number] => 11/855114
[patent_app_country] => US
[patent_app_date] => 2007-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5445
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0072/20090072412.pdf
[firstpage_image] =>[orig_patent_app_number] => 11855114
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/855114 | Integrated circuit package system with package encapsulation having recess | Sep 12, 2007 | Issued |
Array
(
[id] => 4800531
[patent_doc_number] => 20080012118
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-17
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/854583
[patent_app_country] => US
[patent_app_date] => 2007-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6780
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20080012118.pdf
[firstpage_image] =>[orig_patent_app_number] => 11854583
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/854583 | Method of manufacturing semiconductor device | Sep 12, 2007 | Issued |
Array
(
[id] => 6501743
[patent_doc_number] => 20100012959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-21
[patent_title] => 'Optoelectronic Component'
[patent_app_type] => utility
[patent_app_number] => 12/443305
[patent_app_country] => US
[patent_app_date] => 2007-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6930
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20100012959.pdf
[firstpage_image] =>[orig_patent_app_number] => 12443305
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/443305 | Optoelectronic component | Sep 6, 2007 | Issued |