
Leslie Pilar Cruz
Examiner (ID: 15251, Phone: (571)272-8599 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826 |
| Total Applications | 538 |
| Issued Applications | 372 |
| Pending Applications | 2 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1047226
[patent_doc_number] => 06864507
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-08
[patent_title] => 'MISFET'
[patent_app_type] => utility
[patent_app_number] => 10/459807
[patent_app_country] => US
[patent_app_date] => 2003-06-12
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/864/06864507.pdf
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Array
(
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[patent_doc_number] => 20030205747
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[patent_issue_date] => 2003-11-06
[patent_title] => 'Self-aligned source pocket for flash memory cells'
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[patent_app_number] => 10/457471
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[pdf_file] => publications/A1/0205/20030205747.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/457471 | Self-aligned source pocket for flash memory cells | Jun 9, 2003 | Issued |
Array
(
[id] => 5670246
[patent_doc_number] => 20060175600
[patent_country] => US
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[patent_issue_date] => 2006-08-10
[patent_title] => 'Gallium nitride compound semiconductor device and manufacturing method'
[patent_app_type] => utility
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[patent_app_country] => US
[patent_app_date] => 2003-06-04
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/516703 | Gallium nitride compound semiconductor device and manufacturing method | Jun 3, 2003 | Issued |
Array
(
[id] => 7383882
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[patent_issue_date] => 2004-02-12
[patent_title] => 'High performance system-on-chip passive device using post passivation process'
[patent_app_type] => new
[patent_app_number] => 10/445559
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[patent_app_date] => 2003-05-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/445559 | High performance system-on-chip passive device using post passivation process | May 26, 2003 | Issued |
Array
(
[id] => 7629406
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[patent_title] => 'Increasing switching speed of geometric construction gate MOSFET structures'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/438034 | Increasing switching speed of geometric construction gate MOSFET structures | May 12, 2003 | Issued |
Array
(
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[patent_title] => 'Strained-channel transistor and methods of manufacture'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/423513 | Strained-channel transistor and methods of manufacture | Apr 24, 2003 | Issued |
Array
(
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[patent_title] => 'Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method thereof'
[patent_app_type] => utility
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[pdf_file] => patents/06/897/06897504.pdf
[firstpage_image] =>[orig_patent_app_number] => 10403474
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/403474 | Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method thereof | Mar 30, 2003 | Issued |
Array
(
[id] => 7334139
[patent_doc_number] => 20040188786
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[patent_title] => 'Reduced substrate micro-electro-mechanical systems (MEMS) device and system for producing the same'
[patent_app_type] => new
[patent_app_number] => 10/401963
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/401963 | Reduced substrate micro-electro-mechanical systems (MEMS) device and system for producing the same | Mar 30, 2003 | Issued |
Array
(
[id] => 1090048
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[patent_issue_date] => 2004-12-07
[patent_title] => 'Hetero-bipolar transistor with a sub-collector layer having a first portion and plural second portions'
[patent_app_type] => B2
[patent_app_number] => 10/394663
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/394663 | Hetero-bipolar transistor with a sub-collector layer having a first portion and plural second portions | Mar 23, 2003 | Issued |
Array
(
[id] => 7420651
[patent_doc_number] => 20040183087
[patent_country] => US
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[patent_issue_date] => 2004-09-23
[patent_title] => 'System and method for an improved light-emitting device'
[patent_app_type] => new
[patent_app_number] => 10/393643
[patent_app_country] => US
[patent_app_date] => 2003-03-21
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[firstpage_image] =>[orig_patent_app_number] => 10393643
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/393643 | System and method for an improved light-emitting device | Mar 20, 2003 | Issued |
Array
(
[id] => 6827611
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[patent_title] => 'Nonvolatile semiconductor memory and programming methods thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/388633 | Nonvolatile semiconductor memory and programming methods thereof | Mar 16, 2003 | Abandoned |
Array
(
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[patent_title] => 'Geometry-controllable design blocks of MOS transistors for improved ESD protection'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/389354 | Geometry-controllable design blocks of MOS transistors for improved ESD protection | Mar 12, 2003 | Issued |
Array
(
[id] => 1203522
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[patent_title] => 'Power converter with improved lead frame arrangement including stand-up portion'
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Array
(
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[patent_title] => 'Flash memory with self-aligned split gate and methods for fabricating and for operating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/249024 | Flash memory with self-aligned split gate and methods for fabricating and for operating the same | Mar 10, 2003 | Issued |
Array
(
[id] => 991071
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[patent_title] => 'LDMOS transistor with enhanced termination region for high breakdown voltage with low on-resistance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/384144 | LDMOS transistor with enhanced termination region for high breakdown voltage with low on-resistance | Mar 9, 2003 | Issued |
Array
(
[id] => 6981945
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[patent_title] => 'Method for linearizing deflection of a mems device using binary electrodes and voltage odulation'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/506654 | Method for linearizing deflection of a MEMS device using binary electrodes and voltage modulation | Mar 9, 2003 | Issued |
Array
(
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/373404 | Array of semiconductor elements with paired driving scheme | Feb 24, 2003 | Issued |