Search

Leslie Pilar Cruz

Examiner (ID: 15251, Phone: (571)272-8599 , Office: P/2826 )

Most Active Art Unit
2826
Art Unit(s)
2826
Total Applications
538
Issued Applications
372
Pending Applications
2
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1047226 [patent_doc_number] => 06864507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'MISFET' [patent_app_type] => utility [patent_app_number] => 10/459807 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 36 [patent_no_of_words] => 14385 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864507.pdf [firstpage_image] =>[orig_patent_app_number] => 10459807 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459807
MISFET Jun 11, 2003 Issued
Array ( [id] => 6723435 [patent_doc_number] => 20030205747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Self-aligned source pocket for flash memory cells' [patent_app_type] => new [patent_app_number] => 10/457471 [patent_app_country] => US [patent_app_date] => 2003-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4087 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20030205747.pdf [firstpage_image] =>[orig_patent_app_number] => 10457471 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/457471
Self-aligned source pocket for flash memory cells Jun 9, 2003 Issued
Array ( [id] => 5670246 [patent_doc_number] => 20060175600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Gallium nitride compound semiconductor device and manufacturing method' [patent_app_type] => utility [patent_app_number] => 10/516703 [patent_app_country] => US [patent_app_date] => 2003-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8858 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20060175600.pdf [firstpage_image] =>[orig_patent_app_number] => 10516703 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/516703
Gallium nitride compound semiconductor device and manufacturing method Jun 3, 2003 Issued
Array ( [id] => 7383882 [patent_doc_number] => 20040029404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'High performance system-on-chip passive device using post passivation process' [patent_app_type] => new [patent_app_number] => 10/445559 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8953 [patent_no_of_claims] => 127 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20040029404.pdf [firstpage_image] =>[orig_patent_app_number] => 10445559 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445559
High performance system-on-chip passive device using post passivation process May 26, 2003 Issued
Array ( [id] => 7629406 [patent_doc_number] => 06818950 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Increasing switching speed of geometric construction gate MOSFET structures' [patent_app_type] => B1 [patent_app_number] => 10/438034 [patent_app_country] => US [patent_app_date] => 2003-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2994 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/818/06818950.pdf [firstpage_image] =>[orig_patent_app_number] => 10438034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/438034
Increasing switching speed of geometric construction gate MOSFET structures May 12, 2003 Issued
Array ( [id] => 7291777 [patent_doc_number] => 20040212035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Strained-channel transistor and methods of manufacture' [patent_app_type] => new [patent_app_number] => 10/423513 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5957 [patent_no_of_claims] => 93 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20040212035.pdf [firstpage_image] =>[orig_patent_app_number] => 10423513 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/423513
Strained-channel transistor and methods of manufacture Apr 24, 2003 Issued
Array ( [id] => 7615022 [patent_doc_number] => 06897504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 10/403474 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 4887 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897504.pdf [firstpage_image] =>[orig_patent_app_number] => 10403474 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/403474
Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method thereof Mar 30, 2003 Issued
Array ( [id] => 7334139 [patent_doc_number] => 20040188786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Reduced substrate micro-electro-mechanical systems (MEMS) device and system for producing the same' [patent_app_type] => new [patent_app_number] => 10/401963 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3361 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188786.pdf [firstpage_image] =>[orig_patent_app_number] => 10401963 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/401963
Reduced substrate micro-electro-mechanical systems (MEMS) device and system for producing the same Mar 30, 2003 Issued
Array ( [id] => 1090048 [patent_doc_number] => 06828603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Hetero-bipolar transistor with a sub-collector layer having a first portion and plural second portions' [patent_app_type] => B2 [patent_app_number] => 10/394663 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 5530 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828603.pdf [firstpage_image] =>[orig_patent_app_number] => 10394663 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/394663
Hetero-bipolar transistor with a sub-collector layer having a first portion and plural second portions Mar 23, 2003 Issued
Array ( [id] => 7420651 [patent_doc_number] => 20040183087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'System and method for an improved light-emitting device' [patent_app_type] => new [patent_app_number] => 10/393643 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3474 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183087.pdf [firstpage_image] =>[orig_patent_app_number] => 10393643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393643
System and method for an improved light-emitting device Mar 20, 2003 Issued
Array ( [id] => 6827611 [patent_doc_number] => 20030178669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Nonvolatile semiconductor memory and programming methods thereof' [patent_app_type] => new [patent_app_number] => 10/388633 [patent_app_country] => US [patent_app_date] => 2003-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6321 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20030178669.pdf [firstpage_image] =>[orig_patent_app_number] => 10388633 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388633
Nonvolatile semiconductor memory and programming methods thereof Mar 16, 2003 Abandoned
Array ( [id] => 7375420 [patent_doc_number] => 20040178453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Geometry-controllable design blocks of MOS transistors for improved ESD protection' [patent_app_type] => new [patent_app_number] => 10/389354 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2907 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20040178453.pdf [firstpage_image] =>[orig_patent_app_number] => 10389354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/389354
Geometry-controllable design blocks of MOS transistors for improved ESD protection Mar 12, 2003 Issued
Array ( [id] => 1203522 [patent_doc_number] => 06720646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Power converter with improved lead frame arrangement including stand-up portion' [patent_app_type] => B2 [patent_app_number] => 10/384731 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4632 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720646.pdf [firstpage_image] =>[orig_patent_app_number] => 10384731 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/384731
Power converter with improved lead frame arrangement including stand-up portion Mar 10, 2003 Issued
Array ( [id] => 1158432 [patent_doc_number] => 06765260 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Flash memory with self-aligned split gate and methods for fabricating and for operating the same' [patent_app_type] => B1 [patent_app_number] => 10/249024 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4821 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765260.pdf [firstpage_image] =>[orig_patent_app_number] => 10249024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249024
Flash memory with self-aligned split gate and methods for fabricating and for operating the same Mar 10, 2003 Issued
Array ( [id] => 991071 [patent_doc_number] => 06919598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'LDMOS transistor with enhanced termination region for high breakdown voltage with low on-resistance' [patent_app_type] => utility [patent_app_number] => 10/384144 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3219 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/919/06919598.pdf [firstpage_image] =>[orig_patent_app_number] => 10384144 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/384144
LDMOS transistor with enhanced termination region for high breakdown voltage with low on-resistance Mar 9, 2003 Issued
Array ( [id] => 6981945 [patent_doc_number] => 20050152014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Method for linearizing deflection of a mems device using binary electrodes and voltage odulation' [patent_app_type] => utility [patent_app_number] => 10/506654 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2725 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20050152014.pdf [firstpage_image] =>[orig_patent_app_number] => 10506654 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/506654
Method for linearizing deflection of a MEMS device using binary electrodes and voltage modulation Mar 9, 2003 Issued
Array ( [id] => 6832723 [patent_doc_number] => 20030160268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Semiconductor chip, method and apparatus for fabricating the semiconductor chip' [patent_app_type] => new [patent_app_number] => 10/376884 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5242 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160268.pdf [firstpage_image] =>[orig_patent_app_number] => 10376884 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376884
Semiconductor chip, method and apparatus for fabricating the semiconductor chip Feb 27, 2003 Abandoned
Array ( [id] => 6832715 [patent_doc_number] => 20030160260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Light-emitting element and method of producing the same' [patent_app_type] => new [patent_app_number] => 10/375094 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6371 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160260.pdf [firstpage_image] =>[orig_patent_app_number] => 10375094 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/375094
Light-emitting element and method of producing the same Feb 27, 2003 Issued
Array ( [id] => 6832712 [patent_doc_number] => 20030160257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Radiation-emitting semiconductor component with a vertical emission direction and fabrication method for producing the semiconductor component' [patent_app_type] => new [patent_app_number] => 10/375764 [patent_app_country] => US [patent_app_date] => 2003-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2836 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160257.pdf [firstpage_image] =>[orig_patent_app_number] => 10375764 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/375764
Radiation-emitting semiconductor component with a vertical emission direction and fabrication method for producing the semiconductor component Feb 25, 2003 Abandoned
Array ( [id] => 6832710 [patent_doc_number] => 20030160255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Array of semiconductor elements with paired driving scheme' [patent_app_type] => new [patent_app_number] => 10/373404 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5165 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160255.pdf [firstpage_image] =>[orig_patent_app_number] => 10373404 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/373404
Array of semiconductor elements with paired driving scheme Feb 24, 2003 Issued
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