Search

Leslie Pilar Cruz

Examiner (ID: 15251, Phone: (571)272-8599 , Office: P/2826 )

Most Active Art Unit
2826
Art Unit(s)
2826
Total Applications
538
Issued Applications
372
Pending Applications
2
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
10/314176 SEMICONDUCTOR COMPONENT WITH A SPLIT FLOATING GATE AND TUNNEL REGION Dec 5, 2002 Abandoned
Array ( [id] => 7451442 [patent_doc_number] => 20040099898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Semiconductor device with parallel plate trench capacitor and method' [patent_app_type] => new [patent_app_number] => 10/305773 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20040099898.pdf [firstpage_image] =>[orig_patent_app_number] => 10305773 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305773
Semiconductor device with high frequency parallel plate trench capacitor structure Nov 26, 2002 Issued
Array ( [id] => 6666682 [patent_doc_number] => 20030111665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Method of forming three-dimensional photonic band structures in solid materials' [patent_app_type] => new [patent_app_number] => 10/303893 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6037 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20030111665.pdf [firstpage_image] =>[orig_patent_app_number] => 10303893 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/303893
Three-dimensional photonic band structures in solid materials Nov 25, 2002 Issued
Array ( [id] => 6764065 [patent_doc_number] => 20030098463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Avalanche photodiode for photon counting applications and method thereof' [patent_app_type] => new [patent_app_number] => 10/294434 [patent_app_country] => US [patent_app_date] => 2002-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20030098463.pdf [firstpage_image] =>[orig_patent_app_number] => 10294434 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/294434
Avalanche photodiode for photon counting applications and method thereof Nov 12, 2002 Issued
Array ( [id] => 6799449 [patent_doc_number] => 20030094613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Crystalline silicon thin film transistor panel for OELD and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 10/290094 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9595 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20030094613.pdf [firstpage_image] =>[orig_patent_app_number] => 10290094 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/290094
Crystalline silicon thin film transistor panel for OELD and method of fabricating the same Nov 5, 2002 Abandoned
Array ( [id] => 1193788 [patent_doc_number] => 06730981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Bipolar transistor with inclined epitaxial layer' [patent_app_type] => B2 [patent_app_number] => 10/286754 [patent_app_country] => US [patent_app_date] => 2002-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 4203 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 402 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/730/06730981.pdf [firstpage_image] =>[orig_patent_app_number] => 10286754 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/286754
Bipolar transistor with inclined epitaxial layer Nov 3, 2002 Issued
Array ( [id] => 6867643 [patent_doc_number] => 20030080332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Charge carrier extracting transistor' [patent_app_type] => new [patent_app_number] => 10/258853 [patent_app_country] => US [patent_app_date] => 2002-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3427 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080332.pdf [firstpage_image] =>[orig_patent_app_number] => 10258853 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/258853
Charge carrier extracting transistor Oct 28, 2002 Issued
Array ( [id] => 1081361 [patent_doc_number] => 06835997 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Thyristor-based device with trench dielectric material' [patent_app_type] => B1 [patent_app_number] => 10/282294 [patent_app_country] => US [patent_app_date] => 2002-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5043 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/835/06835997.pdf [firstpage_image] =>[orig_patent_app_number] => 10282294 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/282294
Thyristor-based device with trench dielectric material Oct 27, 2002 Issued
Array ( [id] => 6692721 [patent_doc_number] => 20030040153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Semiconductor device incorporated therein high K capacitor dielectric and method for the manufacture thereof' [patent_app_type] => new [patent_app_number] => 10/269997 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2342 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20030040153.pdf [firstpage_image] =>[orig_patent_app_number] => 10269997 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/269997
Semiconductor device incorporated therein high K capacitor dielectric and method for the manufacture thereof Oct 14, 2002 Issued
Array ( [id] => 1171855 [patent_doc_number] => 06753555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-22 [patent_title] => 'DTMOS device having low threshold voltage' [patent_app_type] => B2 [patent_app_number] => 10/268905 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 50 [patent_no_of_words] => 17817 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/753/06753555.pdf [firstpage_image] =>[orig_patent_app_number] => 10268905 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268905
DTMOS device having low threshold voltage Oct 10, 2002 Issued
Array ( [id] => 1018610 [patent_doc_number] => 06891208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Protection structure against electrostatic discharges (ESD) for an electronic device integrated on a SOI substrate, and corresponding integration process' [patent_app_type] => utility [patent_app_number] => 10/268054 [patent_app_country] => US [patent_app_date] => 2002-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4199 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891208.pdf [firstpage_image] =>[orig_patent_app_number] => 10268054 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268054
Protection structure against electrostatic discharges (ESD) for an electronic device integrated on a SOI substrate, and corresponding integration process Oct 7, 2002 Issued
Array ( [id] => 6718684 [patent_doc_number] => 20030052371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/263705 [patent_app_country] => US [patent_app_date] => 2002-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 19068 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 37 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20030052371.pdf [firstpage_image] =>[orig_patent_app_number] => 10263705 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263705
Semiconductor integrated circuit device Oct 3, 2002 Abandoned
Array ( [id] => 7632693 [patent_doc_number] => 06664641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Wiring structure for an integrated circuit' [patent_app_type] => B2 [patent_app_number] => 10/261653 [patent_app_country] => US [patent_app_date] => 2002-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 8116 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664641.pdf [firstpage_image] =>[orig_patent_app_number] => 10261653 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261653
Wiring structure for an integrated circuit Oct 1, 2002 Issued
Array ( [id] => 6837193 [patent_doc_number] => 20030034533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Silicide stop layer in a damascene semiconductor structure' [patent_app_type] => new [patent_app_number] => 10/260441 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2868 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034533.pdf [firstpage_image] =>[orig_patent_app_number] => 10260441 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260441
Silicide stop layer in a damascene semiconductor structure Sep 30, 2002 Abandoned
Array ( [id] => 1266513 [patent_doc_number] => 06661067 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Nitrogen-plasma treatment for reduced nickel silicide bridging' [patent_app_type] => B1 [patent_app_number] => 10/260514 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3177 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661067.pdf [firstpage_image] =>[orig_patent_app_number] => 10260514 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260514
Nitrogen-plasma treatment for reduced nickel silicide bridging Sep 30, 2002 Issued
Array ( [id] => 7278766 [patent_doc_number] => 20040061143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Optimized memory cell physical arrangement' [patent_app_type] => new [patent_app_number] => 10/259804 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6495 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20040061143.pdf [firstpage_image] =>[orig_patent_app_number] => 10259804 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/259804
Optimized memory cell physical arrangement Sep 29, 2002 Issued
Array ( [id] => 6655749 [patent_doc_number] => 20030132434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Luminescence device and its manufacturing method' [patent_app_type] => new [patent_app_number] => 10/221494 [patent_app_country] => US [patent_app_date] => 2002-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4397 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20030132434.pdf [firstpage_image] =>[orig_patent_app_number] => 10221494 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/221494
Light-emitting device and process for production thereof having an emission laser held between electrodes Sep 12, 2002 Issued
Array ( [id] => 6718912 [patent_doc_number] => 20030052599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'White light LED illumination apparatus' [patent_app_type] => new [patent_app_number] => 10/242033 [patent_app_country] => US [patent_app_date] => 2002-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2137 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20030052599.pdf [firstpage_image] =>[orig_patent_app_number] => 10242033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/242033
White light LED illumination apparatus Sep 11, 2002 Abandoned
Array ( [id] => 6816078 [patent_doc_number] => 20030067036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'High-voltage, high-cutoff-frequency electronic MOS device' [patent_app_type] => new [patent_app_number] => 10/237553 [patent_app_country] => US [patent_app_date] => 2002-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2310 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20030067036.pdf [firstpage_image] =>[orig_patent_app_number] => 10237553 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/237553
High-voltage, high-cutoff-frequency electronic MOS device Sep 8, 2002 Issued
Array ( [id] => 6776666 [patent_doc_number] => 20030047746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'GaN substrate formed over GaN layer having discretely formed minute holes produced by use of discretely arranged growth suppression mask elements' [patent_app_type] => new [patent_app_number] => 10/236943 [patent_app_country] => US [patent_app_date] => 2002-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8679 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20030047746.pdf [firstpage_image] =>[orig_patent_app_number] => 10236943 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/236943
GaN substrate formed over GaN layer having discretely formed minute holes produced by use of discretely arranged growth suppression mask elements Sep 8, 2002 Abandoned
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