
Liang Dong
Examiner (ID: 2440, Phone: (571)270-0479 , Office: P/3724 )
| Most Active Art Unit | 3724 |
| Art Unit(s) | 3724 |
| Total Applications | 623 |
| Issued Applications | 285 |
| Pending Applications | 107 |
| Abandoned Applications | 248 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12436656
[patent_doc_number] => 09978736
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-05-22
[patent_title] => Method for manufacturing memory having stacked integrated circuit chip
[patent_app_type] => utility
[patent_app_number] => 15/703144
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/703144 | Method for manufacturing memory having stacked integrated circuit chip | Sep 12, 2017 | Issued |
Array
(
[id] => 12122612
[patent_doc_number] => 20180006198
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[patent_kind] => A1
[patent_issue_date] => 2018-01-04
[patent_title] => 'LIGHT EMITTING DIODE CHIP HAVING WAVELENGTH CONVERTING LAYER AND METHOD OF FABRICATING THE SAME, AND PACKAGE HAVING THE LIGHT EMITTING DIODE CHIP AND METHOD OF FABRICATING THE SAME'
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15703725
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/703725 | Light emitting diode chip having wavelength converting layer and method of fabricating the same, and package having the light emitting diode chip and method of fabricating the same | Sep 12, 2017 | Issued |
Array
(
[id] => 12595656
[patent_doc_number] => 20180090382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-29
[patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/687444
[patent_app_country] => US
[patent_app_date] => 2017-08-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/687444 | Manufacturing method of semiconductor device | Aug 25, 2017 | Issued |
Array
(
[id] => 12223272
[patent_doc_number] => 20180061632
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[patent_kind] => A1
[patent_issue_date] => 2018-03-01
[patent_title] => 'PROCESS OF FORMING NITRIDE SEMICONDUCTOR LAYERS'
[patent_app_type] => utility
[patent_app_number] => 15/686755
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/686755 | Process of forming nitride semiconductor layers | Aug 24, 2017 | Issued |
Array
(
[id] => 12095675
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[patent_issue_date] => 2017-12-07
[patent_title] => 'SEMICONDUCTOR DEVICE MANUFACTURING METHOD'
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[patent_app_number] => 15/686148
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Array
(
[id] => 13995753
[patent_doc_number] => 20190067034
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[patent_kind] => A1
[patent_issue_date] => 2019-02-28
[patent_title] => HYBRID ADDITIVE STRUCTURE STACKABLE MEMORY DIE USING WIRE BOND
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/685940 | HYBRID ADDITIVE STRUCTURE STACKABLE MEMORY DIE USING WIRE BOND | Aug 23, 2017 | Abandoned |
Array
(
[id] => 16410254
[patent_doc_number] => 10818823
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-27
[patent_title] => Group III nitride semiconductor light-emitting element and wafer including such element configuration
[patent_app_type] => utility
[patent_app_number] => 16/327852
[patent_app_country] => US
[patent_app_date] => 2017-08-22
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16327852
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/327852 | Group III nitride semiconductor light-emitting element and wafer including such element configuration | Aug 21, 2017 | Issued |
Array
(
[id] => 14573393
[patent_doc_number] => 20190214304
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-11
[patent_title] => A SEMICONDUCTOR DEVICE INCLUDING MONOLITHICALLY INTEGRATED PMOS AND NMOS TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 16/311911
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 16/311911 | Semiconductor device including monolithically integrated PMOS and NMOS transistors | Aug 6, 2017 | Issued |
Array
(
[id] => 12181775
[patent_doc_number] => 20180040711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-08
[patent_title] => 'NONCENTROSYMMETRIC METAL ELECTRODES FOR FERROIC DEVICES'
[patent_app_type] => utility
[patent_app_number] => 15/666856
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/666856 | Noncentrosymmetric metal electrodes for ferroic devices | Aug 1, 2017 | Issued |
Array
(
[id] => 13909573
[patent_doc_number] => 20190043991
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-07
[patent_title] => INCREASED GATE COUPLING EFFECT IN MULTIGATE TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 15/665441
[patent_app_country] => US
[patent_app_date] => 2017-08-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/665441 | INCREASED GATE COUPLING EFFECT IN MULTIGATE TRANSISTOR | Jul 31, 2017 | Abandoned |
Array
(
[id] => 17181298
[patent_doc_number] => 11158547
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[patent_kind] => B2
[patent_issue_date] => 2021-10-26
[patent_title] => Semiconductor device, method of manufacturing the same, and electronic device including the device
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[rel_patent_id] =>[rel_patent_doc_number] =>) 16/337878 | Semiconductor device, method of manufacturing the same, and electronic device including the device | Jul 30, 2017 | Issued |
Array
(
[id] => 12243426
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[patent_issue_date] => 2018-03-15
[patent_title] => 'SWITCHING DEVICE AND METHOD OF MANUFACTURING THE SAME'
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Array
(
[id] => 12243552
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/659482 | Integrated structures comprising charge-storage regions along outer portions of vertically-extending channel material | Jul 24, 2017 | Issued |
Array
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Array
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Array
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Array
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