
Lien M. Ngo
Examiner (ID: 13892, Phone: (571)272-4545 , Office: P/3754 )
| Most Active Art Unit | 3754 |
| Art Unit(s) | 3727, 3731, 3754 |
| Total Applications | 2364 |
| Issued Applications | 1588 |
| Pending Applications | 131 |
| Abandoned Applications | 652 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5152438
[patent_doc_number] => 20070035320
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-15
[patent_title] => 'Semiconductor integrated circuit which can be burn-in-tested even when packaged and method of burn-in-testing semiconductor integrated circuit even when the semiconductor integrated circuit is packaged'
[patent_app_type] => utility
[patent_app_number] => 11/498928
[patent_app_country] => US
[patent_app_date] => 2006-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3961
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20070035320.pdf
[firstpage_image] =>[orig_patent_app_number] => 11498928
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/498928 | Semiconductor integrated circuit which can be burn-in-tested even when packaged and method of burn-in-testing semiconductor integrated circuit even when the semiconductor integrated circuit is packaged | Aug 2, 2006 | Issued |
Array
(
[id] => 5251013
[patent_doc_number] => 20070132469
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-14
[patent_title] => 'Inspection device and method'
[patent_app_type] => utility
[patent_app_number] => 11/498169
[patent_app_country] => US
[patent_app_date] => 2006-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4403
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0132/20070132469.pdf
[firstpage_image] =>[orig_patent_app_number] => 11498169
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/498169 | Inspection device and method | Aug 2, 2006 | Abandoned |
Array
(
[id] => 436369
[patent_doc_number] => 07262627
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-28
[patent_title] => 'Measuring apparatus, measuring method, and test apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/497506
[patent_app_country] => US
[patent_app_date] => 2006-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 7819
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/262/07262627.pdf
[firstpage_image] =>[orig_patent_app_number] => 11497506
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/497506 | Measuring apparatus, measuring method, and test apparatus | Jul 31, 2006 | Issued |
Array
(
[id] => 5048290
[patent_doc_number] => 20070028834
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-08
[patent_title] => 'Wafer holder for wafer prober and wafer prober equipped with same'
[patent_app_type] => utility
[patent_app_number] => 11/496022
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 11609
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0028/20070028834.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496022
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496022 | Wafer holder for wafer prober and wafer prober equipped with same | Jul 30, 2006 | Abandoned |
Array
(
[id] => 915677
[patent_doc_number] => 07327158
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-02-05
[patent_title] => 'Array testing method using electric bias stress for TFT array'
[patent_app_type] => utility
[patent_app_number] => 11/461381
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 2741
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/327/07327158.pdf
[firstpage_image] =>[orig_patent_app_number] => 11461381
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/461381 | Array testing method using electric bias stress for TFT array | Jul 30, 2006 | Issued |
Array
(
[id] => 5444603
[patent_doc_number] => 20090045829
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-19
[patent_title] => 'Wafer holder for wafer prober and wafer prober equipped with same'
[patent_app_type] => utility
[patent_app_number] => 11/496019
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 11985
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20090045829.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496019
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496019 | Wafer holder for wafer prober and wafer prober equipped with same | Jul 30, 2006 | Abandoned |
Array
(
[id] => 4655290
[patent_doc_number] => 20080024150
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'SURFACE MOUNT PACKAGE FAULT DETECTION APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 11/494502
[patent_app_country] => US
[patent_app_date] => 2006-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3617
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20080024150.pdf
[firstpage_image] =>[orig_patent_app_number] => 11494502
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/494502 | Surface mount package fault detection apparatus | Jul 27, 2006 | Issued |
Array
(
[id] => 6568062
[patent_doc_number] => 20100060294
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-11
[patent_title] => 'Timing generator and semiconductor test apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/989713
[patent_app_country] => US
[patent_app_date] => 2006-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6720
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0060/20100060294.pdf
[firstpage_image] =>[orig_patent_app_number] => 11989713
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/989713 | Timing generator and semiconductor test apparatus | Jul 27, 2006 | Issued |
Array
(
[id] => 5202833
[patent_doc_number] => 20070024312
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Device and method for the testing of integrated semiconductor circuits on wafers'
[patent_app_type] => utility
[patent_app_number] => 11/493628
[patent_app_country] => US
[patent_app_date] => 2006-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2710
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20070024312.pdf
[firstpage_image] =>[orig_patent_app_number] => 11493628
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/493628 | Device and method for the testing of integrated semiconductor circuits on wafers | Jul 26, 2006 | Abandoned |
Array
(
[id] => 6257252
[patent_doc_number] => 20100295571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-11-25
[patent_title] => 'Device and Method for Configuring a Semiconductor Circuit'
[patent_app_type] => utility
[patent_app_number] => 11/990095
[patent_app_country] => US
[patent_app_date] => 2006-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6073
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0295/20100295571.pdf
[firstpage_image] =>[orig_patent_app_number] => 11990095
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/990095 | Device and Method for Configuring a Semiconductor Circuit | Jul 26, 2006 | Abandoned |
Array
(
[id] => 5202821
[patent_doc_number] => 20070024300
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Method for manufacturing integrated circuit, measurement apparatus for integrated circuit, and wafer'
[patent_app_type] => utility
[patent_app_number] => 11/493424
[patent_app_country] => US
[patent_app_date] => 2006-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2675
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20070024300.pdf
[firstpage_image] =>[orig_patent_app_number] => 11493424
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/493424 | Method for testing integrated circuit, and wafer | Jul 25, 2006 | Issued |
Array
(
[id] => 5600025
[patent_doc_number] => 20060290370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-28
[patent_title] => 'TEMPERATURE CONTROL IN IC SOCKETS'
[patent_app_type] => utility
[patent_app_number] => 11/459288
[patent_app_country] => US
[patent_app_date] => 2006-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2866
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20060290370.pdf
[firstpage_image] =>[orig_patent_app_number] => 11459288
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459288 | TEMPERATURE CONTROL IN IC SOCKETS | Jul 20, 2006 | Abandoned |
Array
(
[id] => 5240184
[patent_doc_number] => 20070018675
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-25
[patent_title] => 'SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 11/458781
[patent_app_country] => US
[patent_app_date] => 2006-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2689
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20070018675.pdf
[firstpage_image] =>[orig_patent_app_number] => 11458781
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/458781 | SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUFACTURING METHOD | Jul 19, 2006 | Abandoned |
Array
(
[id] => 821030
[patent_doc_number] => 07408365
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-05
[patent_title] => 'Image sensor testing method and apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/486106
[patent_app_country] => US
[patent_app_date] => 2006-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 6583
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/408/07408365.pdf
[firstpage_image] =>[orig_patent_app_number] => 11486106
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/486106 | Image sensor testing method and apparatus | Jul 13, 2006 | Issued |
Array
(
[id] => 394435
[patent_doc_number] => 07298136
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-11-20
[patent_title] => 'Magnetically coupled electrical test lead'
[patent_app_type] => utility
[patent_app_number] => 11/456048
[patent_app_country] => US
[patent_app_date] => 2006-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 30
[patent_no_of_words] => 6441
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/298/07298136.pdf
[firstpage_image] =>[orig_patent_app_number] => 11456048
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/456048 | Magnetically coupled electrical test lead | Jul 5, 2006 | Issued |
Array
(
[id] => 292843
[patent_doc_number] => 07545138
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-09
[patent_title] => 'Precision, temperature-compensated, shielded current measurement device'
[patent_app_type] => utility
[patent_app_number] => 11/456007
[patent_app_country] => US
[patent_app_date] => 2006-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 8531
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/545/07545138.pdf
[firstpage_image] =>[orig_patent_app_number] => 11456007
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/456007 | Precision, temperature-compensated, shielded current measurement device | Jul 5, 2006 | Issued |
Array
(
[id] => 6225836
[patent_doc_number] => 20100182037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'Diagnostic Method For Load-Testing Self-Excited Three-Phase Generators in a Motor Vehicle'
[patent_app_type] => utility
[patent_app_number] => 11/995395
[patent_app_country] => US
[patent_app_date] => 2006-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2407
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0182/20100182037.pdf
[firstpage_image] =>[orig_patent_app_number] => 11995395
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/995395 | Diagnostic Method For Load-Testing Self-Excited Three-Phase Generators in a Motor Vehicle | Jun 30, 2006 | Abandoned |
Array
(
[id] => 5139496
[patent_doc_number] => 20070001712
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-04
[patent_title] => 'Hi-pot testing device with transfer table automatically connecting to testing signal generator'
[patent_app_type] => utility
[patent_app_number] => 11/478704
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2225
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20070001712.pdf
[firstpage_image] =>[orig_patent_app_number] => 11478704
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478704 | Hi-pot testing device with transfer table automatically connecting to testing signal generator | Jun 29, 2006 | Issued |
Array
(
[id] => 901186
[patent_doc_number] => 07339366
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-03-04
[patent_title] => 'Directional coupler for a accurate power detection'
[patent_app_type] => utility
[patent_app_number] => 11/475783
[patent_app_country] => US
[patent_app_date] => 2006-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2008
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/339/07339366.pdf
[firstpage_image] =>[orig_patent_app_number] => 11475783
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/475783 | Directional coupler for a accurate power detection | Jun 26, 2006 | Issued |
Array
(
[id] => 5197082
[patent_doc_number] => 20070296400
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-27
[patent_title] => 'VOLTAGE GENERATING APPARATUS, CURRENT GENERATING APPARATUS, AND TEST APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 11/475577
[patent_app_country] => US
[patent_app_date] => 2006-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6989
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20070296400.pdf
[firstpage_image] =>[orig_patent_app_number] => 11475577
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/475577 | Voltage generating apparatus, current generating apparatus, and test apparatus | Jun 26, 2006 | Issued |