Search

Lien M. Ngo

Examiner (ID: 13892, Phone: (571)272-4545 , Office: P/3754 )

Most Active Art Unit
3754
Art Unit(s)
3727, 3731, 3754
Total Applications
2364
Issued Applications
1588
Pending Applications
131
Abandoned Applications
652

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6467512 [patent_doc_number] => 20100007369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'DISPLAY SUBSTRATE AND APPARATUS AND METHOD FOR TESTING DISPLAY PANEL HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/561423 [patent_app_country] => US [patent_app_date] => 2009-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7868 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20100007369.pdf [firstpage_image] =>[orig_patent_app_number] => 12561423 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/561423
Display substrate and apparatus and method for testing display panel having the same Sep 16, 2009 Issued
Array ( [id] => 8665197 [patent_doc_number] => 08378660 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Programmable integrated circuit device to support inductive sensing' [patent_app_type] => utility [patent_app_number] => 12/560906 [patent_app_country] => US [patent_app_date] => 2009-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4190 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12560906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/560906
Programmable integrated circuit device to support inductive sensing Sep 15, 2009 Issued
Array ( [id] => 6461721 [patent_doc_number] => 20100090685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'WIDE-RANGE OPEN-LOOP CURRENT SENSOR' [patent_app_type] => utility [patent_app_number] => 12/557817 [patent_app_country] => US [patent_app_date] => 2009-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4168 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20100090685.pdf [firstpage_image] =>[orig_patent_app_number] => 12557817 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/557817
WIDE-RANGE OPEN-LOOP CURRENT SENSOR Sep 10, 2009 Abandoned
Array ( [id] => 6217114 [patent_doc_number] => 20100052767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'SEMICONDUCTOR MODULE' [patent_app_type] => utility [patent_app_number] => 12/552850 [patent_app_country] => US [patent_app_date] => 2009-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4079 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052767.pdf [firstpage_image] =>[orig_patent_app_number] => 12552850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/552850
SEMICONDUCTOR MODULE Sep 1, 2009 Abandoned
Array ( [id] => 8797759 [patent_doc_number] => 08436635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Semiconductor wafer having test modules including pin matrix selectable test devices' [patent_app_type] => utility [patent_app_number] => 12/552215 [patent_app_country] => US [patent_app_date] => 2009-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3616 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12552215 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/552215
Semiconductor wafer having test modules including pin matrix selectable test devices Aug 31, 2009 Issued
Array ( [id] => 5949526 [patent_doc_number] => 20110031993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'Curve Tracer Signal Conversion for Integrated Circuit Testing' [patent_app_type] => utility [patent_app_number] => 12/551524 [patent_app_country] => US [patent_app_date] => 2009-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5222 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20110031993.pdf [firstpage_image] =>[orig_patent_app_number] => 12551524 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/551524
Curve tracer signal conversion for integrated circuit testing Aug 30, 2009 Issued
Array ( [id] => 8714034 [patent_doc_number] => 08400177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Device and method for testing display panel' [patent_app_type] => utility [patent_app_number] => 12/551204 [patent_app_country] => US [patent_app_date] => 2009-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2669 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12551204 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/551204
Device and method for testing display panel Aug 30, 2009 Issued
Array ( [id] => 8630704 [patent_doc_number] => 08362783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Method for verifying a completeness of an antenna' [patent_app_type] => utility [patent_app_number] => 12/548879 [patent_app_country] => US [patent_app_date] => 2009-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6651 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12548879 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/548879
Method for verifying a completeness of an antenna Aug 26, 2009 Issued
Array ( [id] => 6217003 [patent_doc_number] => 20100052698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Integrated circuit architecture for testing variable delay circuit' [patent_app_type] => utility [patent_app_number] => 12/461853 [patent_app_country] => US [patent_app_date] => 2009-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10905 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052698.pdf [firstpage_image] =>[orig_patent_app_number] => 12461853 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/461853
Integrated circuit architecture for testing variable delay circuit Aug 25, 2009 Issued
Array ( [id] => 6216989 [patent_doc_number] => 20100052696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Chip Testing Apparatus and Testing Method Thereof' [patent_app_type] => utility [patent_app_number] => 12/547555 [patent_app_country] => US [patent_app_date] => 2009-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052696.pdf [firstpage_image] =>[orig_patent_app_number] => 12547555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/547555
Chip testing apparatus and testing method thereof Aug 25, 2009 Issued
Array ( [id] => 6021948 [patent_doc_number] => 20110050274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'Maintaining A Wafer/Wafer Translator Pair In An Attached State Free Of A Gasket Disposed Therebetween' [patent_app_type] => utility [patent_app_number] => 12/547418 [patent_app_country] => US [patent_app_date] => 2009-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20110050274.pdf [firstpage_image] =>[orig_patent_app_number] => 12547418 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/547418
Maintaining a wafer/wafer translator pair in an attached state free of a gasket disposed therebetween Aug 24, 2009 Issued
Array ( [id] => 4466163 [patent_doc_number] => 07936165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Current sensor' [patent_app_type] => utility [patent_app_number] => 12/545918 [patent_app_country] => US [patent_app_date] => 2009-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7412 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/936/07936165.pdf [firstpage_image] =>[orig_patent_app_number] => 12545918 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/545918
Current sensor Aug 23, 2009 Issued
Array ( [id] => 5926214 [patent_doc_number] => 20110037455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'SYSTEM FOR MEASURING ELECTRICAL POWER' [patent_app_type] => utility [patent_app_number] => 12/541990 [patent_app_country] => US [patent_app_date] => 2009-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6461 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20110037455.pdf [firstpage_image] =>[orig_patent_app_number] => 12541990 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/541990
SYSTEM FOR MEASURING ELECTRICAL POWER Aug 16, 2009 Abandoned
Array ( [id] => 5926212 [patent_doc_number] => 20110037454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'CdSe QUANTUM DOTS DOPED OPTICAL FIBER AND A CURRENT SENSOR USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/540412 [patent_app_country] => US [patent_app_date] => 2009-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3702 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20110037454.pdf [firstpage_image] =>[orig_patent_app_number] => 12540412 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/540412
CdSe QUANTUM DOTS DOPED OPTICAL FIBER AND A CURRENT SENSOR USING THE SAME Aug 12, 2009 Abandoned
Array ( [id] => 6452057 [patent_doc_number] => 20100039131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'SYSTEM AND METHOD FOR MODULATION MAPPING' [patent_app_type] => utility [patent_app_number] => 12/534069 [patent_app_country] => US [patent_app_date] => 2009-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20100039131.pdf [firstpage_image] =>[orig_patent_app_number] => 12534069 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/534069
System and method for modulation mapping Jul 30, 2009 Issued
Array ( [id] => 5488580 [patent_doc_number] => 20090289651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'PROBE CARD LAYOUT' [patent_app_type] => utility [patent_app_number] => 12/512844 [patent_app_country] => US [patent_app_date] => 2009-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5168 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20090289651.pdf [firstpage_image] =>[orig_patent_app_number] => 12512844 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/512844
Probe card layout Jul 29, 2009 Issued
Array ( [id] => 8630715 [patent_doc_number] => 08362794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Method and system for assessing reliability of integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/508111 [patent_app_country] => US [patent_app_date] => 2009-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5294 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12508111 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/508111
Method and system for assessing reliability of integrated circuit Jul 22, 2009 Issued
Array ( [id] => 6225827 [patent_doc_number] => 20100182032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-22 [patent_title] => 'PRINTED CIRCUIT BOARD TESTING FIXTURE' [patent_app_type] => utility [patent_app_number] => 12/506411 [patent_app_country] => US [patent_app_date] => 2009-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1280 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20100182032.pdf [firstpage_image] =>[orig_patent_app_number] => 12506411 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/506411
Printed circuit board testing fixture Jul 20, 2009 Issued
Array ( [id] => 7551320 [patent_doc_number] => 08063654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-22 [patent_title] => 'Apparatus and method for testing of stacked die structure' [patent_app_type] => utility [patent_app_number] => 12/505215 [patent_app_country] => US [patent_app_date] => 2009-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8492 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/063/08063654.pdf [firstpage_image] =>[orig_patent_app_number] => 12505215 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/505215
Apparatus and method for testing of stacked die structure Jul 16, 2009 Issued
Array ( [id] => 8422420 [patent_doc_number] => 08278909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Wide-dynamic range electrometer with a fast response' [patent_app_type] => utility [patent_app_number] => 12/504652 [patent_app_country] => US [patent_app_date] => 2009-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7197 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12504652 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/504652
Wide-dynamic range electrometer with a fast response Jul 15, 2009 Issued
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