Lien M. Ngo

Array ( [id] => 5313961 [patent_doc_number] => 20090278559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'Inspection device and inspection method' [patent_app_type] => utility [patent_app_number] => 12/458588 [patent_app_country] => US [patent_app_date] => 2009-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 15573 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20090278559.pdf [firstpage_image] =>[orig_patent_app_number] => 12458588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8105251 [patent_doc_number] => 08154275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-10 [patent_title] => 'Apparatus and method for testing sense amplifier thresholds on an integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/503315 [patent_app_country] => US [patent_app_date] => 2009-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3820 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/154/08154275.pdf [firstpage_image] =>[orig_patent_app_number] => 12503315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6217032 [patent_doc_number] => 20100052712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'TEST APPARATUS FOR TESTING CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 12/497706 [patent_app_country] => US [patent_app_date] => 2009-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 792 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052712.pdf [firstpage_image] =>[orig_patent_app_number] => 12497706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6091517 [patent_doc_number] => 20110001504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'METHOD AND APPARATUS OF DEEMBEDDING' [patent_app_type] => utility [patent_app_number] => 12/496946 [patent_app_country] => US [patent_app_date] => 2009-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6337 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20110001504.pdf [firstpage_image] =>[orig_patent_app_number] => 12496946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7742306 [patent_doc_number] => 08106675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Test system' [patent_app_type] => utility [patent_app_number] => 12/458008 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6120 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/106/08106675.pdf [firstpage_image] =>[orig_patent_app_number] => 12458008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4610846 [patent_doc_number] => 07994809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Transfer mechanism for target object to be inspected' [patent_app_type] => utility [patent_app_number] => 12/492676 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5385 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/994/07994809.pdf [firstpage_image] =>[orig_patent_app_number] => 12492676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6209044 [patent_doc_number] => 20110133721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'METHOD OF DIAGNOSING A MALFUNCTION IN AN ABNORMAL VOLTAGE DETECTING APPARATUS, SECONDARY BATTERY SYSTEM, AND HYBRID VEHICLE' [patent_app_type] => utility [patent_app_number] => 13/000695 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7794 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133721.pdf [firstpage_image] =>[orig_patent_app_number] => 13000695 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7796530 [patent_doc_number] => 08125238 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Automatic test equipment' [patent_app_type] => utility [patent_app_number] => 12/491065 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4668 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/125/08125238.pdf [firstpage_image] =>[orig_patent_app_number] => 12491065 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4619842 [patent_doc_number] => 07999563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-16 [patent_title] => 'Chuck for supporting and retaining a test substrate and a calibration substrate' [patent_app_type] => utility [patent_app_number] => 12/489913 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6035 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/999/07999563.pdf [firstpage_image] =>[orig_patent_app_number] => 12489913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6575967 [patent_doc_number] => 20100321050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'ON-CHIP MEASUREMENT OF SIGNALS' [patent_app_type] => utility [patent_app_number] => 12/489525 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20100321050.pdf [firstpage_image] =>[orig_patent_app_number] => 12489525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4458065 [patent_doc_number] => 07893705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Module for test device for testing circuit boards' [patent_app_type] => utility [patent_app_number] => 12/484510 [patent_app_country] => US [patent_app_date] => 2009-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6452 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/893/07893705.pdf [firstpage_image] =>[orig_patent_app_number] => 12484510 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5372015 [patent_doc_number] => 20090309575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-17 [patent_title] => 'MULTI-OUTPUT DETERMINATION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/481152 [patent_app_country] => US [patent_app_date] => 2009-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6769 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20090309575.pdf [firstpage_image] =>[orig_patent_app_number] => 12481152 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6371127 [patent_doc_number] => 20100315115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'METHOD OF CHARACTERIZING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/478776 [patent_app_country] => US [patent_app_date] => 2009-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5092 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20100315115.pdf [firstpage_image] =>[orig_patent_app_number] => 12478776 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6241449 [patent_doc_number] => 20100134127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'MECHANICAL DECOUPLING OF A PROBE CARD ASSEMBLY TO IMPROVE THERMAL RESPONSE' [patent_app_type] => utility [patent_app_number] => 12/478117 [patent_app_country] => US [patent_app_date] => 2009-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 16594 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20100134127.pdf [firstpage_image] =>[orig_patent_app_number] => 12478117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6419713 [patent_doc_number] => 20100277194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'CHIP PIN TEST APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/475510 [patent_app_country] => US [patent_app_date] => 2009-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1030 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20100277194.pdf [firstpage_image] =>[orig_patent_app_number] => 12475510 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5300772 [patent_doc_number] => 20090295424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'Test circuit and method for an electronic device' [patent_app_type] => utility [patent_app_number] => 12/455075 [patent_app_country] => US [patent_app_date] => 2009-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0295/20090295424.pdf [firstpage_image] =>[orig_patent_app_number] => 12455075 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5550290 [patent_doc_number] => 20090284276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'PROBE CARD' [patent_app_type] => utility [patent_app_number] => 12/464916 [patent_app_country] => US [patent_app_date] => 2009-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 5495 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20090284276.pdf [firstpage_image] =>[orig_patent_app_number] => 12464916 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5537239 [patent_doc_number] => 20090219044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'Calibration technique for measuring gate resistance of power MOS gate device at wafer level' [patent_app_type] => utility [patent_app_number] => 12/454004 [patent_app_country] => US [patent_app_date] => 2009-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3765 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20090219044.pdf [firstpage_image] =>[orig_patent_app_number] => 12454004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5512505 [patent_doc_number] => 20090212809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'DEVICE TEST AND DEBUG USING POWER AND GROUND TERMINALS' [patent_app_type] => utility [patent_app_number] => 12/434312 [patent_app_country] => US [patent_app_date] => 2009-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 12580 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20090212809.pdf [firstpage_image] =>[orig_patent_app_number] => 12434312 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6419723 [patent_doc_number] => 20100277196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'SEMICONDUCTOR TEST SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/434010 [patent_app_country] => US [patent_app_date] => 2009-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3764 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20100277196.pdf [firstpage_image] =>[orig_patent_app_number] => 12434010 [rel_patent_id] =>[rel_patent_doc_number] =>)