
Linh M. Nguyen
Examiner (ID: 16124)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 3992, 2816, 2857 |
| Total Applications | 1009 |
| Issued Applications | 920 |
| Pending Applications | 36 |
| Abandoned Applications | 53 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7417505
[patent_doc_number] => 20040160281
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[patent_issue_date] => 2004-08-19
[patent_title] => 'Circuitry to reduce PLL lock acquisition time'
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[patent_app_number] => 10/780493
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Array
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[patent_title] => 'Pulse duty cycle automatic correction device and method thereof'
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Array
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[patent_title] => 'Phase locked loop circuit'
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Array
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Array
(
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Array
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[patent_title] => 'Timing circuit for separate positive and negative edge placement in a switching DC-DC converter'
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Array
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[patent_title] => 'Interpolation delay cell for 2ps resolution jitter injector in optical link transceiver'
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Array
(
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[patent_doc_number] => 20050052214
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[patent_issue_date] => 2005-03-10
[patent_title] => 'Level shifter circuit'
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[patent_app_number] => 10/747240
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/747240 | Level shifter circuit | Dec 29, 2003 | Abandoned |
Array
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[id] => 7239273
[patent_doc_number] => 20050140416
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[patent_issue_date] => 2005-06-30
[patent_title] => 'Programmable direct interpolating delay locked loop'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/746105 | Programmable direct interpolating delay locked loop | Dec 23, 2003 | Issued |
Array
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[patent_title] => 'Circuit for generating phase comparison signal'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/746519 | Circuit for generating phase comparison signal | Dec 23, 2003 | Issued |
Array
(
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[patent_title] => 'Low power circuit with proper slew rate by automatic adjustment of bias current'
[patent_app_type] => reissue
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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