
Linh M. Nguyen
Examiner (ID: 16124)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 3992, 2816, 2857 |
| Total Applications | 1009 |
| Issued Applications | 920 |
| Pending Applications | 36 |
| Abandoned Applications | 53 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1044488
[patent_doc_number] => 06867627
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-03-15
[patent_title] => 'Delay-locked loop (DLL) integrated circuits having high bandwidth and reliable locking characteristics'
[patent_app_type] => utility
[patent_app_number] => 10/663624
[patent_app_country] => US
[patent_app_date] => 2003-09-16
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[pdf_file] => patents/06/867/06867627.pdf
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Array
(
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[patent_doc_number] => 20040090255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-05-13
[patent_title] => 'Delay circuit with delay relatively independent of process, voltage, and temperature variations'
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[patent_app_date] => 2003-09-15
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Array
(
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[patent_issue_date] => 2005-02-01
[patent_title] => 'Single-line synchronizable oscillator circuit'
[patent_app_type] => utility
[patent_app_number] => 10/657506
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/657506 | Single-line synchronizable oscillator circuit | Sep 7, 2003 | Issued |
Array
(
[id] => 7059307
[patent_doc_number] => 20050001666
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[patent_issue_date] => 2005-01-06
[patent_title] => 'DELAY CIRCUIT HAVING FUNCTION OF FILTER CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 10/656254
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[patent_app_date] => 2003-09-08
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Array
(
[id] => 775109
[patent_doc_number] => 07002383
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[patent_issue_date] => 2006-02-21
[patent_title] => 'Method and apparatus for synthesizing a clock signal using a compact and low power delay locked loop (DLL)'
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Array
(
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[patent_doc_number] => 06825703
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[patent_issue_date] => 2004-11-30
[patent_title] => 'Delay locked loop and method of driving the same'
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Array
(
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[patent_doc_number] => 20050046452
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[patent_title] => 'All digital PLL trimming circuit'
[patent_app_type] => utility
[patent_app_number] => 10/653614
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/653614 | All digital PLL trimming circuit | Sep 1, 2003 | Issued |
Array
(
[id] => 620684
[patent_doc_number] => 07142042
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[patent_issue_date] => 2006-11-28
[patent_title] => 'Nulled error amplifier'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/651849 | Nulled error amplifier | Aug 28, 2003 | Issued |
Array
(
[id] => 7382140
[patent_doc_number] => 20040036515
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[patent_issue_date] => 2004-02-26
[patent_title] => 'Method and circuit for adjusting the timing of output data based on an operational mode of output drivers'
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Array
(
[id] => 1041379
[patent_doc_number] => 06870404
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[patent_issue_date] => 2005-03-22
[patent_title] => 'Programmable differential capacitors for equalization circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/652863 | Programmable differential capacitors for equalization circuits | Aug 27, 2003 | Issued |
Array
(
[id] => 1083820
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[patent_title] => 'Sinusoidal frequency generator and periodic signal converter using thereof'
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Array
(
[id] => 7377234
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[patent_title] => 'Phase-locked loop integrated circuits that support clock signal updates during dead zone compensation time intervals'
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Array
(
[id] => 1022853
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Array
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Array
(
[id] => 991218
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[patent_title] => 'Ring-resister controlled DLL with fine delay line and direct skew sensing detector'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/635913 | Ring-resister controlled DLL with fine delay line and direct skew sensing detector | Aug 6, 2003 | Issued |
Array
(
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[patent_title] => 'Multiplexer methods and apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/635968 | Multiplexer methods and apparatus | Aug 6, 2003 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/630311 | Circuitry for reducing leakage currents in a pre-charge circuit using very small MOSFET devices | Jul 29, 2003 | Issued |