
Linh V. Nguyen
Examiner (ID: 5541, Phone: (571)272-1810 , Office: P/2845 )
| Most Active Art Unit | 2845 |
| Art Unit(s) | 2819, 2845, 3992 |
| Total Applications | 2307 |
| Issued Applications | 2062 |
| Pending Applications | 115 |
| Abandoned Applications | 167 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18292840
[patent_doc_number] => 11621716
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-04-04
[patent_title] => Return-to-zero (RZ) digital-to-analog converter (DAC) for image cancellation
[patent_app_type] => utility
[patent_app_number] => 17/448461
[patent_app_country] => US
[patent_app_date] => 2021-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 10266
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17448461
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/448461 | Return-to-zero (RZ) digital-to-analog converter (DAC) for image cancellation | Sep 21, 2021 | Issued |
Array
(
[id] => 18271872
[patent_doc_number] => 20230093114
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => Latency Reduction in Analog-to-Digital Converter-Based Receiver Circuits
[patent_app_type] => utility
[patent_app_number] => 17/482322
[patent_app_country] => US
[patent_app_date] => 2021-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9424
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482322
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/482322 | Latency reduction in analog-to-digital converter-based receiver circuits | Sep 21, 2021 | Issued |
Array
(
[id] => 17340135
[patent_doc_number] => 20220006466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-06
[patent_title] => TEMPERATURE FEEDBACK CONTROL APPARATUS, METHOD, AND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/448113
[patent_app_country] => US
[patent_app_date] => 2021-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4685
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17448113
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/448113 | Temperature feedback control apparatus, method, and system | Sep 19, 2021 | Issued |
Array
(
[id] => 18286393
[patent_doc_number] => 20230101865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-30
[patent_title] => PATTERN-BASED STRING COMPRESSION
[patent_app_type] => utility
[patent_app_number] => 17/475183
[patent_app_country] => US
[patent_app_date] => 2021-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8900
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475183
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/475183 | Pattern-based string compression | Sep 13, 2021 | Issued |
Array
(
[id] => 17340134
[patent_doc_number] => 20220006465
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-06
[patent_title] => Linearization of Digital-to-Analog Converters (DACs) and Analog-to-Digital Converters (ADCs) and Associated Methods
[patent_app_type] => utility
[patent_app_number] => 17/474677
[patent_app_country] => US
[patent_app_date] => 2021-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13035
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474677
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/474677 | Linearization of digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) and associated methods | Sep 13, 2021 | Issued |
Array
(
[id] => 18416307
[patent_doc_number] => 11670857
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-06
[patent_title] => Antenna apparatus
[patent_app_type] => utility
[patent_app_number] => 17/473214
[patent_app_country] => US
[patent_app_date] => 2021-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 9261
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473214
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/473214 | Antenna apparatus | Sep 12, 2021 | Issued |
Array
(
[id] => 17971984
[patent_doc_number] => 11489539
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-11-01
[patent_title] => Analog-to-digital converter and method of operating same
[patent_app_type] => utility
[patent_app_number] => 17/474017
[patent_app_country] => US
[patent_app_date] => 2021-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9943
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 381
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474017
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/474017 | Analog-to-digital converter and method of operating same | Sep 12, 2021 | Issued |
Array
(
[id] => 17773087
[patent_doc_number] => 11405045
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Linearization of digital-to-analog converters (DACs) and analog-to- digital converters (ADCs) and associated methods
[patent_app_type] => utility
[patent_app_number] => 17/472055
[patent_app_country] => US
[patent_app_date] => 2021-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 10183
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472055
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/472055 | Linearization of digital-to-analog converters (DACs) and analog-to- digital converters (ADCs) and associated methods | Sep 9, 2021 | Issued |
Array
(
[id] => 17738886
[patent_doc_number] => 20220224348
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-14
[patent_title] => High Gain Detector Techniques for Low Bandwidth Low Noise Phase-Locked Loops
[patent_app_type] => utility
[patent_app_number] => 17/461997
[patent_app_country] => US
[patent_app_date] => 2021-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12102
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461997
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/461997 | High gain detector techniques for low bandwidth low noise phase-locked loops | Aug 30, 2021 | Issued |
Array
(
[id] => 18089234
[patent_doc_number] => 11539375
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-27
[patent_title] => System and method for direct signal down-conversion and decimation
[patent_app_type] => utility
[patent_app_number] => 17/459655
[patent_app_country] => US
[patent_app_date] => 2021-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5677
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459655
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/459655 | System and method for direct signal down-conversion and decimation | Aug 26, 2021 | Issued |
Array
(
[id] => 18221511
[patent_doc_number] => 20230060505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => TECHNIQUES TO REDUCE QUANTIZATION NOISE IN DELTA SIGMA CONVERTERS
[patent_app_type] => utility
[patent_app_number] => 17/459071
[patent_app_country] => US
[patent_app_date] => 2021-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7808
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459071
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/459071 | TECHNIQUES TO REDUCE QUANTIZATION NOISE IN DELTA SIGMA CONVERTERS | Aug 26, 2021 | Abandoned |
Array
(
[id] => 17278734
[patent_doc_number] => 20210384932
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-09
[patent_title] => TIME INTERLEAVED PHASED ARRAY RECEIVERS
[patent_app_type] => utility
[patent_app_number] => 17/410498
[patent_app_country] => US
[patent_app_date] => 2021-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5600
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -31
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410498
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/410498 | Time interleaved phased array receivers | Aug 23, 2021 | Issued |
Array
(
[id] => 17893762
[patent_doc_number] => 11456752
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-27
[patent_title] => Pipeline analog to digital converter and analog to digital conversion method
[patent_app_type] => utility
[patent_app_number] => 17/408524
[patent_app_country] => US
[patent_app_date] => 2021-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3535
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17408524
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/408524 | Pipeline analog to digital converter and analog to digital conversion method | Aug 22, 2021 | Issued |
Array
(
[id] => 18249496
[patent_doc_number] => 11606101
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-14
[patent_title] => Analog-to-digital converter
[patent_app_type] => utility
[patent_app_number] => 17/406193
[patent_app_country] => US
[patent_app_date] => 2021-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9007
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406193
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/406193 | Analog-to-digital converter | Aug 18, 2021 | Issued |
Array
(
[id] => 17909230
[patent_doc_number] => 11463100
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-10-04
[patent_title] => Digital-to-analog converter and digital-to-analog conversion method thereof
[patent_app_type] => utility
[patent_app_number] => 17/406907
[patent_app_country] => US
[patent_app_date] => 2021-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 6110
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406907
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/406907 | Digital-to-analog converter and digital-to-analog conversion method thereof | Aug 18, 2021 | Issued |
Array
(
[id] => 18131842
[patent_doc_number] => 11558060
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-17
[patent_title] => Ratiometric analog-to-digital conversion circuit
[patent_app_type] => utility
[patent_app_number] => 17/405492
[patent_app_country] => US
[patent_app_date] => 2021-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 5021
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17405492
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/405492 | Ratiometric analog-to-digital conversion circuit | Aug 17, 2021 | Issued |
Array
(
[id] => 18875383
[patent_doc_number] => 11863209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Integrated circuit and method capable of minimizing circuit area of non-volatile memory circuit
[patent_app_type] => utility
[patent_app_number] => 17/405051
[patent_app_country] => US
[patent_app_date] => 2021-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2755
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17405051
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/405051 | Integrated circuit and method capable of minimizing circuit area of non-volatile memory circuit | Aug 17, 2021 | Issued |
Array
(
[id] => 17403600
[patent_doc_number] => 20220045691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => SYSTEM AND METHOD TO COMPENSATE FOR FEEDBACK DELAYS IN DIGITAL CLASS-D MODULATORS
[patent_app_type] => utility
[patent_app_number] => 17/395952
[patent_app_country] => US
[patent_app_date] => 2021-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8256
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395952
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/395952 | SYSTEM AND METHOD TO COMPENSATE FOR FEEDBACK DELAYS IN DIGITAL CLASS-D MODULATORS | Aug 5, 2021 | Abandoned |
Array
(
[id] => 18156828
[patent_doc_number] => 11569829
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-31
[patent_title] => ADC having adjustable threshold levels for PAM signal processing
[patent_app_type] => utility
[patent_app_number] => 17/394386
[patent_app_country] => US
[patent_app_date] => 2021-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 5922
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394386
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/394386 | ADC having adjustable threshold levels for PAM signal processing | Aug 3, 2021 | Issued |
Array
(
[id] => 18372306
[patent_doc_number] => 11652491
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-16
[patent_title] => High-pass shaped dither in continuous-time residue generation systems for analog-to-digital converters
[patent_app_type] => utility
[patent_app_number] => 17/390852
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 10877
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390852
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/390852 | High-pass shaped dither in continuous-time residue generation systems for analog-to-digital converters | Jul 29, 2021 | Issued |