Search

Linh V. Nguyen

Examiner (ID: 332, Phone: (571)272-1810 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
3992, 2819, 2845
Total Applications
2309
Issued Applications
2062
Pending Applications
115
Abandoned Applications
167

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5188126 [patent_doc_number] => 20070166434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Wafer' [patent_app_type] => utility [patent_app_number] => 10/541302 [patent_app_country] => US [patent_app_date] => 2004-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3785 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20070166434.pdf [firstpage_image] =>[orig_patent_app_number] => 10541302 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/541302
Wafer Jan 6, 2004 Issued
Array ( [id] => 7309346 [patent_doc_number] => 20040142570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Post high voltage gate dielectric pattern plasma surface treatment' [patent_app_type] => new [patent_app_number] => 10/752886 [patent_app_country] => US [patent_app_date] => 2004-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4947 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20040142570.pdf [firstpage_image] =>[orig_patent_app_number] => 10752886 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/752886
Post high voltage gate dielectric pattern plasma surface treatment Jan 5, 2004 Issued
Array ( [id] => 7235624 [patent_doc_number] => 20040157456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Surface defect elimination using directed beam method' [patent_app_type] => new [patent_app_number] => 10/752638 [patent_app_country] => US [patent_app_date] => 2004-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1590 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157456.pdf [firstpage_image] =>[orig_patent_app_number] => 10752638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/752638
Surface defect elimination using directed beam method Jan 5, 2004 Abandoned
Array ( [id] => 397606 [patent_doc_number] => 07294575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-13 [patent_title] => 'Chemical mechanical polishing process for forming shallow trench isolation structure' [patent_app_type] => utility [patent_app_number] => 10/752362 [patent_app_country] => US [patent_app_date] => 2004-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3258 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/294/07294575.pdf [firstpage_image] =>[orig_patent_app_number] => 10752362 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/752362
Chemical mechanical polishing process for forming shallow trench isolation structure Jan 4, 2004 Issued
Array ( [id] => 7406929 [patent_doc_number] => 20040175943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'System and method of pattern detection for semiconductor wafer map data' [patent_app_type] => new [patent_app_number] => 10/751602 [patent_app_country] => US [patent_app_date] => 2004-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2892 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20040175943.pdf [firstpage_image] =>[orig_patent_app_number] => 10751602 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/751602
System and method of pattern detection for semiconductor wafer map data Jan 4, 2004 Abandoned
Array ( [id] => 383072 [patent_doc_number] => 07307024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-11 [patent_title] => 'Flash memory and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 10/747311 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 2766 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/307/07307024.pdf [firstpage_image] =>[orig_patent_app_number] => 10747311 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/747311
Flash memory and fabrication method thereof Dec 29, 2003 Issued
Array ( [id] => 5135708 [patent_doc_number] => 20070077337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'Process for the preparation of instant soup mix from indian dill (anethum sowa)' [patent_app_type] => utility [patent_app_number] => 10/584664 [patent_app_country] => US [patent_app_date] => 2003-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4938 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20070077337.pdf [firstpage_image] =>[orig_patent_app_number] => 10584664 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/584664
Process for the preparation of instant soup mix from indian dill (anethum sowa) Dec 26, 2003 Abandoned
Array ( [id] => 7430285 [patent_doc_number] => 20040266204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method for patterning metal wire in semiconductor device' [patent_app_type] => new [patent_app_number] => 10/732528 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3976 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266204.pdf [firstpage_image] =>[orig_patent_app_number] => 10732528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/732528
Method for patterning metal wire in semiconductor device Dec 10, 2003 Abandoned
Array ( [id] => 612749 [patent_doc_number] => 07148146 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-12-12 [patent_title] => 'Method of fabricating an integral capacitor and gate transistor having nitride and oxide polish stop layers using chemical mechanical polishing elimination' [patent_app_type] => utility [patent_app_number] => 10/733034 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 7767 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/148/07148146.pdf [firstpage_image] =>[orig_patent_app_number] => 10733034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/733034
Method of fabricating an integral capacitor and gate transistor having nitride and oxide polish stop layers using chemical mechanical polishing elimination Dec 10, 2003 Issued
Array ( [id] => 411612 [patent_doc_number] => 07282450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-16 [patent_title] => 'Sidewall coverage for copper damascene filling' [patent_app_type] => utility [patent_app_number] => 10/733722 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2859 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/282/07282450.pdf [firstpage_image] =>[orig_patent_app_number] => 10733722 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/733722
Sidewall coverage for copper damascene filling Dec 10, 2003 Issued
Array ( [id] => 809556 [patent_doc_number] => 07416681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-26 [patent_title] => 'Etching solution for multiple layer of copper and molybdenum and etching method using the same' [patent_app_type] => utility [patent_app_number] => 10/732346 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6820 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/416/07416681.pdf [firstpage_image] =>[orig_patent_app_number] => 10732346 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/732346
Etching solution for multiple layer of copper and molybdenum and etching method using the same Dec 10, 2003 Issued
Array ( [id] => 876263 [patent_doc_number] => 07358190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-15 [patent_title] => 'Methods of filling gaps by deposition on materials having different deposition rates' [patent_app_type] => utility [patent_app_number] => 10/732931 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2993 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/358/07358190.pdf [firstpage_image] =>[orig_patent_app_number] => 10732931 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/732931
Methods of filling gaps by deposition on materials having different deposition rates Dec 10, 2003 Issued
Array ( [id] => 612755 [patent_doc_number] => 07148152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Method for fabricating a mask, method for fabricating a patterned thin film and a micro device' [patent_app_type] => utility [patent_app_number] => 10/731088 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 37 [patent_no_of_words] => 7129 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/148/07148152.pdf [firstpage_image] =>[orig_patent_app_number] => 10731088 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/731088
Method for fabricating a mask, method for fabricating a patterned thin film and a micro device Dec 9, 2003 Issued
Array ( [id] => 7419095 [patent_doc_number] => 20040182817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Method for manufacturing electro-optical device, electro-optical device, and electronic apparatus' [patent_app_type] => new [patent_app_number] => 10/732198 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 19824 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20040182817.pdf [firstpage_image] =>[orig_patent_app_number] => 10732198 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/732198
Method for manufacturing electro-optical device, electro-optical device, and electronic apparatus Dec 9, 2003 Issued
Array ( [id] => 500545 [patent_doc_number] => 07205241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Method for manufacturing semiconductor device with contact body extended in direction of bit line' [patent_app_type] => utility [patent_app_number] => 10/731931 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 7202 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205241.pdf [firstpage_image] =>[orig_patent_app_number] => 10731931 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/731931
Method for manufacturing semiconductor device with contact body extended in direction of bit line Dec 9, 2003 Issued
Array ( [id] => 7430166 [patent_doc_number] => 20040266194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/725434 [patent_app_country] => US [patent_app_date] => 2003-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4601 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266194.pdf [firstpage_image] =>[orig_patent_app_number] => 10725434 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/725434
Method for manufacturing a semiconductor device Dec 2, 2003 Issued
Array ( [id] => 7018921 [patent_doc_number] => 20050220940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Process for the production of edible coated cores and cores produced by the process' [patent_app_type] => utility [patent_app_number] => 10/503551 [patent_app_country] => US [patent_app_date] => 2003-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6020 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20050220940.pdf [firstpage_image] =>[orig_patent_app_number] => 10503551 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/503551
Process for the production of edible coated cores and cores produced by the process Dec 1, 2003 Abandoned
Array ( [id] => 453041 [patent_doc_number] => 07247569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-24 [patent_title] => 'Ultra-thin Si MOSFET device structure and method of manufacture' [patent_app_type] => utility [patent_app_number] => 10/725848 [patent_app_country] => US [patent_app_date] => 2003-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6794 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/247/07247569.pdf [firstpage_image] =>[orig_patent_app_number] => 10725848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/725848
Ultra-thin Si MOSFET device structure and method of manufacture Dec 1, 2003 Issued
Array ( [id] => 390286 [patent_doc_number] => 07300882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Etching method and semiconductor device fabricating method' [patent_app_type] => utility [patent_app_number] => 10/721260 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2627 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/300/07300882.pdf [firstpage_image] =>[orig_patent_app_number] => 10721260 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/721260
Etching method and semiconductor device fabricating method Nov 25, 2003 Issued
Array ( [id] => 6938244 [patent_doc_number] => 20050111806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Method of smoothing waveguide structures' [patent_app_type] => utility [patent_app_number] => 10/721448 [patent_app_country] => US [patent_app_date] => 2003-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3995 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20050111806.pdf [firstpage_image] =>[orig_patent_app_number] => 10721448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/721448
Method of smoothing waveguide structures Nov 23, 2003 Issued
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