
Lisa A. Kilday
Examiner (ID: 8394)
| Most Active Art Unit | 2829 |
| Art Unit(s) | 2813, 2829 |
| Total Applications | 329 |
| Issued Applications | 312 |
| Pending Applications | 7 |
| Abandoned Applications | 10 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4407695
[patent_doc_number] => 06239027
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-29
[patent_title] => 'Method using a photoresist residue'
[patent_app_type] => 1
[patent_app_number] => 9/256566
[patent_app_country] => US
[patent_app_date] => 1999-02-24
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[patent_words_short_claim] => 90
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[pdf_file] => patents/06/239/06239027.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/256566 | Method using a photoresist residue | Feb 23, 1999 | Issued |
Array
(
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[patent_doc_number] => 06100190
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[patent_kind] => NA
[patent_issue_date] => 2000-08-08
[patent_title] => 'Method of fabricating semiconductor device, and semiconductor device'
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[patent_app_date] => 1999-02-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/251425 | Method of fabricating semiconductor device, and semiconductor device | Feb 16, 1999 | Issued |
Array
(
[id] => 4350995
[patent_doc_number] => 06291341
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[patent_kind] => NA
[patent_issue_date] => 2001-09-18
[patent_title] => 'Method for PECVD deposition of selected material films'
[patent_app_type] => 1
[patent_app_number] => 9/249478
[patent_app_country] => US
[patent_app_date] => 1999-02-12
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[firstpage_image] =>[orig_patent_app_number] => 249478
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/249478 | Method for PECVD deposition of selected material films | Feb 11, 1999 | Issued |
| 09/243156 | SILICONE POLYMER INSULATION FILM ON SEMICONDUCTOR SUBSTRATE AND METHOD FOR FORMING THE FILM | Feb 1, 1999 | Abandoned |
Array
(
[id] => 4408890
[patent_doc_number] => 06265328
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[patent_kind] => NA
[patent_issue_date] => 2001-07-24
[patent_title] => 'Wafer edge engineering method and device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/239477 | Wafer edge engineering method and device | Jan 27, 1999 | Issued |
Array
(
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[patent_issue_date] => 2000-12-26
[patent_title] => 'Methods for making reliable via structures having hydrophobic inner wall surfaces'
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[patent_app_date] => 1999-01-20
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/234235 | Methods for making reliable via structures having hydrophobic inner wall surfaces | Jan 19, 1999 | Issued |
Array
(
[id] => 4084257
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[patent_issue_date] => 2000-12-19
[patent_title] => 'In-situ boron doped polysilicon with dual layer and dual grain structure for use in integrated circuits manufacturing'
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[patent_app_number] => 9/232114
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[firstpage_image] =>[orig_patent_app_number] => 232114
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/232114 | In-situ boron doped polysilicon with dual layer and dual grain structure for use in integrated circuits manufacturing | Jan 14, 1999 | Issued |
Array
(
[id] => 1441110
[patent_doc_number] => 06335295
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[patent_issue_date] => 2002-01-01
[patent_title] => 'Flame-free wet oxidation'
[patent_app_type] => B1
[patent_app_number] => 09/231265
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/231265 | Flame-free wet oxidation | Jan 14, 1999 | Issued |
Array
(
[id] => 4247907
[patent_doc_number] => 06221788
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[patent_kind] => NA
[patent_issue_date] => 2001-04-24
[patent_title] => 'Semiconductor and a method for manufacturing an oxide film on the surface of a semiconductor substrate'
[patent_app_type] => 1
[patent_app_number] => 9/213626
[patent_app_country] => US
[patent_app_date] => 1998-12-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/213626 | Semiconductor and a method for manufacturing an oxide film on the surface of a semiconductor substrate | Dec 17, 1998 | Issued |
Array
(
[id] => 4246098
[patent_doc_number] => 06136671
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[patent_issue_date] => 2000-10-24
[patent_title] => 'Method for forming gate oxide layers'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/212214 | Method for forming gate oxide layers | Dec 15, 1998 | Issued |
Array
(
[id] => 4215072
[patent_doc_number] => 06110825
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[patent_issue_date] => 2000-08-29
[patent_title] => 'Process for forming front-back through contacts in micro-integrated electronic devices'
[patent_app_type] => 1
[patent_app_number] => 9/200496
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[patent_app_date] => 1998-11-25
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[pdf_file] => patents/06/110/06110825.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/200496 | Process for forming front-back through contacts in micro-integrated electronic devices | Nov 24, 1998 | Issued |
Array
(
[id] => 4236006
[patent_doc_number] => 06165901
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[patent_issue_date] => 2000-12-26
[patent_title] => 'Method of fabricating self-aligned contact'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/199970 | Method of fabricating self-aligned contact | Nov 24, 1998 | Issued |
Array
(
[id] => 4354399
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[patent_title] => 'Copper dendrite prevention by chemical removal of dielectric'
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Array
(
[id] => 4417677
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[patent_title] => 'Rapid thermal etch and rapid thermal oxidation'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/183486 | Semiconductor processing methods | Oct 29, 1998 | Issued |
Array
(
[id] => 1435935
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[patent_title] => 'Manufacturing method for a composite device'
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Array
(
[id] => 4406217
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[patent_title] => 'CVD nanoporous silica low dielectric constant films'
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[firstpage_image] =>[orig_patent_app_number] => 177044
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/177044 | CVD nanoporous silica low dielectric constant films | Oct 21, 1998 | Issued |
Array
(
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Array
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[patent_title] => 'Method of making an article comprising an oxide layer on a GaAs-based semiconductor body'
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Array
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