Search

Lisa S. Park

Examiner (ID: 4161)

Most Active Art Unit
1729
Art Unit(s)
1729
Total Applications
793
Issued Applications
550
Pending Applications
105
Abandoned Applications
172

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18073685 [patent_doc_number] => 11532524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Integrated circuit test method and structure thereof [patent_app_type] => utility [patent_app_number] => 17/195537 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 7879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195537
Integrated circuit test method and structure thereof Mar 7, 2021 Issued
Array ( [id] => 16920512 [patent_doc_number] => 20210193604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SEMICONDUCTOR CHIP WITH REDUCED PITCH CONDUCTIVE PILLARS [patent_app_type] => utility [patent_app_number] => 17/195046 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195046
Semiconductor chip with reduced pitch conductive pillars Mar 7, 2021 Issued
Array ( [id] => 17855287 [patent_doc_number] => 20220285330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE HAVING GALVANIC ISOLATION AND METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/190542 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190542 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190542
Semiconductor device package having galvanic isolation and method therefor Mar 2, 2021 Issued
Array ( [id] => 17941770 [patent_doc_number] => 11476230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/189228 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 8160 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189228 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189228
Semiconductor device and method of manufacturing semiconductor device Feb 28, 2021 Issued
Array ( [id] => 17833691 [patent_doc_number] => 20220270995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SIDEWALL WETTING BARRIER FOR CONDUCTIVE PILLARS [patent_app_type] => utility [patent_app_number] => 17/185244 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185244
Sidewall wetting barrier for conductive pillars Feb 24, 2021 Issued
Array ( [id] => 18507581 [patent_doc_number] => 11705408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/185944 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 9817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185944
Semiconductor package Feb 24, 2021 Issued
Array ( [id] => 19086259 [patent_doc_number] => 20240113060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => HETEROGENEOUS SOLDER BUMP STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/276787 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18276787 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/276787
HETEROGENEOUS SOLDER BUMP STRUCTURE Feb 21, 2021 Pending
Array ( [id] => 19086259 [patent_doc_number] => 20240113060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => HETEROGENEOUS SOLDER BUMP STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/276787 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18276787 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/276787
HETEROGENEOUS SOLDER BUMP STRUCTURE Feb 21, 2021 Pending
Array ( [id] => 19086259 [patent_doc_number] => 20240113060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => HETEROGENEOUS SOLDER BUMP STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/276787 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18276787 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/276787
HETEROGENEOUS SOLDER BUMP STRUCTURE Feb 21, 2021 Pending
Array ( [id] => 18282613 [patent_doc_number] => 20230098085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => ORGANIC EL DISPLAY DEVICE, PRODUCTION METHOD FOR CURED PRODUCT, AND PRODUCTION METHOD FOR ORGANIC EL DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/794658 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17794658 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/794658
Organic EL display device, production method for cured product, and production method for organic EL display device Feb 7, 2021 Issued
Array ( [id] => 17203572 [patent_doc_number] => 20210343667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => INTEGRATED FAN-OUT STRUCTURES AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/167267 [patent_app_country] => US [patent_app_date] => 2021-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17167267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/167267
Integrated fan-out structures and methods for forming the same Feb 3, 2021 Issued
Array ( [id] => 17010994 [patent_doc_number] => 20210242155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/163610 [patent_app_country] => US [patent_app_date] => 2021-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/163610
Semiconductor device and semiconductor device manufacturing method Jan 31, 2021 Issued
Array ( [id] => 17708767 [patent_doc_number] => 20220208775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE HAVING SOURCE-SELECT-GATE CUT STRUCTURES AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/162861 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162861 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162861
Three-dimensional memory device having source-select-gate cut structures and methods for forming the same Jan 28, 2021 Issued
Array ( [id] => 19330449 [patent_doc_number] => 12048149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Three-dimensional memory device having source-select-gate cut structures and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/162904 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 18847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162904
Three-dimensional memory device having source-select-gate cut structures and methods for forming the same Jan 28, 2021 Issued
Array ( [id] => 18236022 [patent_doc_number] => 11600588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-07 [patent_title] => Superconducting bump bonds for quantum computing systems [patent_app_type] => utility [patent_app_number] => 17/163232 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 13802 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163232 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/163232
Superconducting bump bonds for quantum computing systems Jan 28, 2021 Issued
Array ( [id] => 17764855 [patent_doc_number] => 20220238468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/159080 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159080
Semiconductor device and method for fabricating the same Jan 25, 2021 Issued
Array ( [id] => 16889085 [patent_doc_number] => 20210175282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => DISPLAY APPARATUS WITH DETECTION DEVICE [patent_app_type] => utility [patent_app_number] => 17/158283 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158283 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158283
Display apparatus with detection device Jan 25, 2021 Issued
Array ( [id] => 17347155 [patent_doc_number] => 20220013486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => SEMICONDUCTOR COMPOSITE STRUCTURE, METHOD FOR MAKING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 17/149835 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2823 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17149835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/149835
SEMICONDUCTOR COMPOSITE STRUCTURE, METHOD FOR MAKING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE SAME Jan 14, 2021 Abandoned
Array ( [id] => 17070700 [patent_doc_number] => 20210272917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/148923 [patent_app_country] => US [patent_app_date] => 2021-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17148923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/148923
Method of manufacturing semiconductor device Jan 13, 2021 Issued
Array ( [id] => 17738087 [patent_doc_number] => 20220223549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => CONDUCTIVE STRUCTURE AND ELECTRONIC DEVICE COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 17/146675 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9005 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/146675
Conductive structure and electronic device comprising the same Jan 11, 2021 Issued
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