
Lisa Solomon
Examiner (ID: 2253)
| Most Active Art Unit | 2853 |
| Art Unit(s) | 2861, 2853 |
| Total Applications | 1587 |
| Issued Applications | 1416 |
| Pending Applications | 96 |
| Abandoned Applications | 112 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20018113
[patent_doc_number] => 20250156335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => VECTOR PROCESSOR STORAGE
[patent_app_type] => utility
[patent_app_number] => 19/020108
[patent_app_country] => US
[patent_app_date] => 2025-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1063
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19020108
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/020108 | VECTOR PROCESSOR STORAGE | Jan 13, 2025 | Pending |
Array
(
[id] => 20009469
[patent_doc_number] => 20250147691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 19/014367
[patent_app_country] => US
[patent_app_date] => 2025-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16278
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19014367
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/014367 | MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY | Jan 8, 2025 | Pending |
Array
(
[id] => 20152098
[patent_doc_number] => 20250251936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => Reservation Station Design Method FOR Vector Execution Units
[patent_app_type] => utility
[patent_app_number] => 19/010244
[patent_app_country] => US
[patent_app_date] => 2025-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1288
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 417
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19010244
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/010244 | Reservation Station Design Method FOR Vector Execution Units | Jan 5, 2025 | Pending |
Array
(
[id] => 20323108
[patent_doc_number] => 20250335196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => APPLICATION PROGRAMMING INTERFACE TO WAIT ON MATRIX MULTIPLY-ACCUMULATE
[patent_app_type] => utility
[patent_app_number] => 18/977633
[patent_app_country] => US
[patent_app_date] => 2024-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 61831
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18977633
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/977633 | APPLICATION PROGRAMMING INTERFACE TO WAIT ON MATRIX MULTIPLY-ACCUMULATE | Dec 10, 2024 | Pending |
Array
(
[id] => 19834729
[patent_doc_number] => 20250086515
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => DIRECT-CONNECTED MACHINE LEARNING ACCELERATOR
[patent_app_type] => utility
[patent_app_number] => 18/954763
[patent_app_country] => US
[patent_app_date] => 2024-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3403
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18954763
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/954763 | DIRECT-CONNECTED MACHINE LEARNING ACCELERATOR | Nov 20, 2024 | Pending |
Array
(
[id] => 20027193
[patent_doc_number] => 20250165415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => SYSTEMS, METHODS, AND APPARATUS FOR USING ON-DIE PROTOCOL WITH DIE-TO-DIE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/943849
[patent_app_country] => US
[patent_app_date] => 2024-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 25224
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -33
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18943849
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/943849 | SYSTEMS, METHODS, AND APPARATUS FOR USING ON-DIE PROTOCOL WITH DIE-TO-DIE SYSTEM | Nov 10, 2024 | Pending |
Array
(
[id] => 20027162
[patent_doc_number] => 20250165384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => STORAGE DEVICE PROVIDING DIRECT MEMORY ACCESS, COMPUTING SYSTEM INCLUDING THE STORAGE DEVICE AND OPERATING METHOD OF THE STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/930522
[patent_app_country] => US
[patent_app_date] => 2024-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7695
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18930522
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/930522 | STORAGE DEVICE PROVIDING DIRECT MEMORY ACCESS, COMPUTING SYSTEM INCLUDING THE STORAGE DEVICE AND OPERATING METHOD OF THE STORAGE DEVICE | Oct 28, 2024 | Pending |
Array
(
[id] => 20061750
[patent_doc_number] => 20250199972
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/929778
[patent_app_country] => US
[patent_app_date] => 2024-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4360
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18929778
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/929778 | SEMICONDUCTOR DEVICE | Oct 28, 2024 | Issued |
Array
(
[id] => 19891910
[patent_doc_number] => 20250117222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AND ACCUMULATION
[patent_app_type] => utility
[patent_app_number] => 18/930671
[patent_app_country] => US
[patent_app_date] => 2024-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21210
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18930671
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/930671 | SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AND ACCUMULATION | Oct 28, 2024 | Pending |
Array
(
[id] => 19757230
[patent_doc_number] => 20250045795
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => METHODS AND SYSTEMS TO MONITOR A MEDIA DEVICE VIA A USB PORT
[patent_app_type] => utility
[patent_app_number] => 18/926607
[patent_app_country] => US
[patent_app_date] => 2024-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10904
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18926607
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/926607 | METHODS AND SYSTEMS TO MONITOR A MEDIA DEVICE VIA A USB PORT | Oct 24, 2024 | Pending |
Array
(
[id] => 20018122
[patent_doc_number] => 20250156344
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => APPARATUSES AND METHODS FOR GENERATING A UNIQUE IDENTIFIER IN A MEMORY FOR I3C PROTOCOL
[patent_app_type] => utility
[patent_app_number] => 18/908532
[patent_app_country] => US
[patent_app_date] => 2024-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1217
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18908532
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/908532 | APPARATUSES AND METHODS FOR GENERATING A UNIQUE IDENTIFIER IN A MEMORY FOR I3C PROTOCOL | Oct 6, 2024 | Issued |
Array
(
[id] => 20017767
[patent_doc_number] => 20250155989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => PHYSICAL BUTTON OPERATION METHOD AND HANDHELD ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/906140
[patent_app_country] => US
[patent_app_date] => 2024-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18906140
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/906140 | PHYSICAL BUTTON OPERATION METHOD AND HANDHELD ELECTRONIC DEVICE | Oct 2, 2024 | Pending |
Array
(
[id] => 19892037
[patent_doc_number] => 20250117349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => SYSTEM ON CHIP WITH SAFE HARDWARE SUBSYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/903605
[patent_app_country] => US
[patent_app_date] => 2024-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4425
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903605
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/903605 | SYSTEM ON CHIP WITH SAFE HARDWARE SUBSYSTEM | Sep 30, 2024 | Pending |
Array
(
[id] => 20666426
[patent_doc_number] => 12608201
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-21
[patent_title] => Systems, apparatuses, and methods for addition of partial products
[patent_app_type] => utility
[patent_app_number] => 18/886639
[patent_app_country] => US
[patent_app_date] => 2024-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 29
[patent_no_of_words] => 15079
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18886639
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/886639 | Systems, apparatuses, and methods for addition of partial products | Sep 15, 2024 | Issued |
Array
(
[id] => 20601850
[patent_doc_number] => 20260079860
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-03-19
[patent_title] => Mechanisms For Arbitrating Among Packets In Hierarchical Arbitration Architecture
[patent_app_type] => utility
[patent_app_number] => 18/884854
[patent_app_country] => US
[patent_app_date] => 2024-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16992
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18884854
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/884854 | Mechanisms for arbitrating among packets in hierarchical arbitration architecture | Sep 12, 2024 | Issued |
Array
(
[id] => 19660651
[patent_doc_number] => 20240427716
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => SYSTEMS, METHODS, AND APPARATUS TO ENABLE DATA AGGREGATION AND ADAPTATION IN HARDWARE ACCELERATION SUBSYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/816201
[patent_app_country] => US
[patent_app_date] => 2024-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13005
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18816201
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/816201 | SYSTEMS, METHODS, AND APPARATUS TO ENABLE DATA AGGREGATION AND ADAPTATION IN HARDWARE ACCELERATION SUBSYSTEMS | Aug 26, 2024 | Pending |
Array
(
[id] => 20557021
[patent_doc_number] => 20260056807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-26
[patent_title] => FAIR SPINLOCK WITH PROTECTION AGAINST THREAD PREEMPTION
[patent_app_type] => utility
[patent_app_number] => 18/809994
[patent_app_country] => US
[patent_app_date] => 2024-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18050
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809994
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/809994 | FAIR SPINLOCK WITH PROTECTION AGAINST THREAD PREEMPTION | Aug 19, 2024 | Pending |
Array
(
[id] => 20018025
[patent_doc_number] => 20250156247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => DATA PROCESSING METHOD, ELECTRONIC DEVICE AND COMPUTER-READABLE STORAGE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 18/800654
[patent_app_country] => US
[patent_app_date] => 2024-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6977
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800654
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/800654 | DATA PROCESSING METHOD, ELECTRONIC DEVICE AND COMPUTER-READABLE STORAGE MEDIUM | Aug 11, 2024 | Pending |
Array
(
[id] => 20304081
[patent_doc_number] => 12450069
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-21
[patent_title] => NIC line-rate hardware packet processing
[patent_app_type] => utility
[patent_app_number] => 18/796511
[patent_app_country] => US
[patent_app_date] => 2024-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 1188
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18796511
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/796511 | NIC line-rate hardware packet processing | Aug 6, 2024 | Issued |
Array
(
[id] => 19558594
[patent_doc_number] => 20240370386
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/772354
[patent_app_country] => US
[patent_app_date] => 2024-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772354
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/772354 | Memory device supporting a high-efficient input/output interface and a memory system including the memory device | Jul 14, 2024 | Issued |