Lisa Solomon

Array ( [id] => 13906621 [patent_doc_number] => 20190042515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => SYSTEM DECODER FOR TRAINING ACCELERATORS [patent_app_type] => utility [patent_app_number] => 15/848218 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12665980 [patent_doc_number] => 20180113826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => STORAGE APPARATUS ACCESSED BY USING MEMORY BUS [patent_app_type] => utility [patent_app_number] => 15/834016 [patent_app_country] => US [patent_app_date] => 2017-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14202983 [patent_doc_number] => 10268608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Memory module with timing-controlled data paths in distributed data buffers [patent_app_type] => utility [patent_app_number] => 15/820076 [patent_app_country] => US [patent_app_date] => 2017-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 29 [patent_no_of_words] => 11137 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16171489 [patent_doc_number] => 10713056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Wide vector execution in single thread mode for an out-of-order processor [patent_app_type] => utility [patent_app_number] => 15/806419 [patent_app_country] => US [patent_app_date] => 2017-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6191 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15806419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13157635 [patent_doc_number] => 10095542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Cooperative thread array granularity context switch during trap handling [patent_app_type] => utility [patent_app_number] => 15/798174 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10390 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15798174 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16233234 [patent_doc_number] => 10740787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Methods and systems to monitor a media device via a USB port [patent_app_type] => utility [patent_app_number] => 15/789332 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15789332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14750845 [patent_doc_number] => 20190258596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => PROVISION OF INFORMATION REGARDING ADDITIONAL FUNCTIONALITIES OF FIELD BUS COMPONENTS [patent_app_type] => utility [patent_app_number] => 16/347218 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16347218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14149703 [patent_doc_number] => 10255232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Computer architecture with a hardware accumulator reset [patent_app_type] => utility [patent_app_number] => 15/726410 [patent_app_country] => US [patent_app_date] => 2017-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6506 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15726410 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14135873 [patent_doc_number] => 20190102326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => METHOD, APPARATUS, SYSTEM FOR EARLY PAGE GRANULAR HINTS FROM A PCIE DEVICE [patent_app_type] => utility [patent_app_number] => 15/721777 [patent_app_country] => US [patent_app_date] => 2017-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15721777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14555529 [patent_doc_number] => 10346226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Methods and apparatus for transmitting time sensitive data over a tunneled bus interface [patent_app_type] => utility [patent_app_number] => 15/720603 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720603 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14110275 [patent_doc_number] => 20190096813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => INTEGRATION OF A PROGRAMMABLE DEVICE AND A PROCESSING SYSTEM IN AN INTEGRATED CIRCUIT PACKAGE [patent_app_type] => utility [patent_app_number] => 15/719288 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719288 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14107387 [patent_doc_number] => 20190095369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => PROCESSORS, METHODS, AND SYSTEMS FOR A MEMORY FENCE IN A CONFIGURABLE SPATIAL ACCELERATOR [patent_app_type] => utility [patent_app_number] => 15/719285 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719285 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12140210 [patent_doc_number] => 20180018293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'METHOD, CONTROLLER, AND SYSTEM FOR SERVICE FLOW CONTROL IN OBJECT-BASED STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/716163 [patent_app_country] => US [patent_app_date] => 2017-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 26285 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15716163 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16065073 [patent_doc_number] => 10691486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Processor comprising a plurality of computation cores [patent_app_type] => utility [patent_app_number] => 15/714704 [patent_app_country] => US [patent_app_date] => 2017-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3424 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15714704 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12570855 [patent_doc_number] => 10019201 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-10 [patent_title] => Reservations over multiple paths over fabrics [patent_app_type] => utility [patent_app_number] => 15/667529 [patent_app_country] => US [patent_app_date] => 2017-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667529 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16145553 [patent_doc_number] => 10705847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Wide vector execution in single thread mode for an out-of-order processor [patent_app_type] => utility [patent_app_number] => 15/665653 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6167 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16037311 [patent_doc_number] => 10681097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Methods and systems for data transmission [patent_app_type] => utility [patent_app_number] => 15/649456 [patent_app_country] => US [patent_app_date] => 2017-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 19109 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15649456 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15043117 [patent_doc_number] => 20190332563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => PLUG CONNECTOR COMPONENT, PLUG CONNECTOR, PLUG CONNECTOR SYSTEM AND METHOD FOR ASSEMBLING AND OPERATING A PLUG CONNECTOR [patent_app_type] => utility [patent_app_number] => 16/310156 [patent_app_country] => US [patent_app_date] => 2017-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16310156 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17499362 [patent_doc_number] => 11288068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Systems, methods, and apparatus for matrix move [patent_app_type] => utility [patent_app_number] => 16/487747 [patent_app_country] => US [patent_app_date] => 2017-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 44 [patent_no_of_words] => 19544 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16487747 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17016984 [patent_doc_number] => 11086623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Systems, methods, and apparatuses for tile matrix multiplication and accumulation [patent_app_type] => utility [patent_app_number] => 16/487787 [patent_app_country] => US [patent_app_date] => 2017-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 47 [patent_no_of_words] => 21338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16487787 [rel_patent_id] =>[rel_patent_doc_number] =>)