
Lisa Solomon
Examiner (ID: 2253)
| Most Active Art Unit | 2853 |
| Art Unit(s) | 2861, 2853 |
| Total Applications | 1587 |
| Issued Applications | 1416 |
| Pending Applications | 96 |
| Abandoned Applications | 112 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19978773
[patent_doc_number] => 12346248
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-01
[patent_title] => Private memory mode sequential memory access in multi-threaded computing
[patent_app_type] => utility
[patent_app_number] => 18/231820
[patent_app_country] => US
[patent_app_date] => 2023-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 15486
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231820
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/231820 | Private memory mode sequential memory access in multi-threaded computing | Aug 8, 2023 | Issued |
Array
(
[id] => 20174784
[patent_doc_number] => 12393531
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Quad-channel DRAM
[patent_app_type] => utility
[patent_app_number] => 18/231108
[patent_app_country] => US
[patent_app_date] => 2023-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 4931
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231108
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/231108 | Quad-channel DRAM | Aug 6, 2023 | Issued |
Array
(
[id] => 18941731
[patent_doc_number] => 20240036870
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => Coprocessor Operation Bundling
[patent_app_type] => utility
[patent_app_number] => 18/361212
[patent_app_country] => US
[patent_app_date] => 2023-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14007
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361212
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/361212 | Coprocessor operation bundling | Jul 27, 2023 | Issued |
Array
(
[id] => 19204764
[patent_doc_number] => 20240176663
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => TENSOR MAP CACHE STORAGE
[patent_app_type] => utility
[patent_app_number] => 18/219622
[patent_app_country] => US
[patent_app_date] => 2023-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 79877
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219622
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/219622 | TENSOR MAP CACHE STORAGE | Jul 6, 2023 | Pending |
Array
(
[id] => 19811006
[patent_doc_number] => 12242398
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-04
[patent_title] => Polling regulation for storage input/output in a computer system
[patent_app_type] => utility
[patent_app_number] => 18/348880
[patent_app_country] => US
[patent_app_date] => 2023-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5861
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348880
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/348880 | Polling regulation for storage input/output in a computer system | Jul 6, 2023 | Issued |
Array
(
[id] => 18741832
[patent_doc_number] => 20230350813
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => Method and Apparatus for Dual Issue Multiply Instructions
[patent_app_type] => utility
[patent_app_number] => 18/348047
[patent_app_country] => US
[patent_app_date] => 2023-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 38428
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348047
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/348047 | Method and apparatus for dual issue multiply instructions | Jul 5, 2023 | Issued |
Array
(
[id] => 18741837
[patent_doc_number] => 20230350819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => METHODS AND APPARATUS TO EXTEND LOCAL BUFFER OF A HARDWARE ACCELERATOR
[patent_app_type] => utility
[patent_app_number] => 18/345098
[patent_app_country] => US
[patent_app_date] => 2023-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14203
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345098
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/345098 | Methods and apparatus to extend local buffer of a hardware accelerator | Jun 29, 2023 | Issued |
Array
(
[id] => 18904641
[patent_doc_number] => 20240020126
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => Fusion with Destructive Instructions
[patent_app_type] => utility
[patent_app_number] => 18/344986
[patent_app_country] => US
[patent_app_date] => 2023-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12443
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18344986
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/344986 | Fusion with destructive instructions | Jun 29, 2023 | Issued |
Array
(
[id] => 19413326
[patent_doc_number] => 12079142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-03
[patent_title] => PC-based instruction group permissions
[patent_app_type] => utility
[patent_app_number] => 18/343145
[patent_app_country] => US
[patent_app_date] => 2023-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 21
[patent_no_of_words] => 18340
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18343145
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/343145 | PC-based instruction group permissions | Jun 27, 2023 | Issued |
Array
(
[id] => 20160031
[patent_doc_number] => 12386659
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Scheduling multiple processing-in-memory (PIM) threads and non-PIM threads
[patent_app_type] => utility
[patent_app_number] => 18/214733
[patent_app_country] => US
[patent_app_date] => 2023-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8009
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18214733
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/214733 | Scheduling multiple processing-in-memory (PIM) threads and non-PIM threads | Jun 26, 2023 | Issued |
Array
(
[id] => 18864339
[patent_doc_number] => 20230418775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => Heterogeneous Compute Platform Architecture For Efficient Hosting Of Network Functions
[patent_app_type] => utility
[patent_app_number] => 18/213028
[patent_app_country] => US
[patent_app_date] => 2023-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5963
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213028
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/213028 | Heterogeneous compute platform architecture for efficient hosting of network functions | Jun 21, 2023 | Issued |
Array
(
[id] => 19765032
[patent_doc_number] => 12223323
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-11
[patent_title] => Out-of-order vector iota calculations
[patent_app_type] => utility
[patent_app_number] => 18/337652
[patent_app_country] => US
[patent_app_date] => 2023-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8260
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337652
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/337652 | Out-of-order vector iota calculations | Jun 19, 2023 | Issued |
Array
(
[id] => 18941726
[patent_doc_number] => 20240036865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => APPARATUSES, METHODS, AND SYSTEMS FOR HASHING INSTRUCTIONS
[patent_app_type] => utility
[patent_app_number] => 18/336985
[patent_app_country] => US
[patent_app_date] => 2023-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 29197
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336985
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/336985 | Apparatuses, methods, and systems for hashing instructions | Jun 16, 2023 | Issued |
Array
(
[id] => 19603224
[patent_doc_number] => 20240394104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-28
[patent_title] => PRESERVING QUALITY OF SERVICE FOR CLIENT APPLICATIONS HAVING WORKLOADS FOR EXECUTION BY A COMPUTE CORE OR A HARDWARE ACCELERATOR
[patent_app_type] => utility
[patent_app_number] => 18/324693
[patent_app_country] => US
[patent_app_date] => 2023-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12359
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324693
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/324693 | Preserving quality of service for client applications having workloads for execution by a compute core or a hardware accelerator | May 25, 2023 | Issued |
Array
(
[id] => 19212305
[patent_doc_number] => 12001367
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-04
[patent_title] => Multi-die integrated circuit with data processing engine array
[patent_app_type] => utility
[patent_app_number] => 18/320147
[patent_app_country] => US
[patent_app_date] => 2023-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 22552
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320147
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/320147 | Multi-die integrated circuit with data processing engine array | May 17, 2023 | Issued |
Array
(
[id] => 19933579
[patent_doc_number] => 12306783
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-20
[patent_title] => Top level network and array level network for reconfigurable data processors
[patent_app_type] => utility
[patent_app_number] => 18/199361
[patent_app_country] => US
[patent_app_date] => 2023-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 24
[patent_no_of_words] => 14457
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18199361
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/199361 | Top level network and array level network for reconfigurable data processors | May 17, 2023 | Issued |
Array
(
[id] => 19369823
[patent_doc_number] => 12061909
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries
[patent_app_type] => utility
[patent_app_number] => 18/312380
[patent_app_country] => US
[patent_app_date] => 2023-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4726
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312380
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/312380 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | May 3, 2023 | Issued |
Array
(
[id] => 19780533
[patent_doc_number] => 12229567
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-18
[patent_title] => Fault isolation in a director processor slice or board
[patent_app_type] => utility
[patent_app_number] => 18/142732
[patent_app_country] => US
[patent_app_date] => 2023-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4530
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142732
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/142732 | Fault isolation in a director processor slice or board | May 2, 2023 | Issued |
Array
(
[id] => 19558591
[patent_doc_number] => 20240370383
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => METHOD AND SYSTEM TO PERFORM COMPLIANCE AND AVAILABILITY CHECK FOR INTERNET SMALL COMPUTER SYSTEM INTERFACE (ISCSI) SERVICE IN DISTRIBUTED STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/141995
[patent_app_country] => US
[patent_app_date] => 2023-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5464
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141995
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/141995 | METHOD AND SYSTEM TO PERFORM COMPLIANCE AND AVAILABILITY CHECK FOR INTERNET SMALL COMPUTER SYSTEM INTERFACE (ISCSI) SERVICE IN DISTRIBUTED STORAGE SYSTEM | Apr 30, 2023 | Abandoned |
Array
(
[id] => 19625634
[patent_doc_number] => 12164463
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-10
[patent_title] => Buffer splitting
[patent_app_type] => utility
[patent_app_number] => 18/130667
[patent_app_country] => US
[patent_app_date] => 2023-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 18
[patent_no_of_words] => 12619
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18130667
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/130667 | Buffer splitting | Apr 3, 2023 | Issued |