Search

Lissi Mojica Marquis

Examiner (ID: 14253)

Most Active Art Unit
3104
Art Unit(s)
3613, 3107, 3614, 3661, 3104, 3105
Total Applications
667
Issued Applications
565
Pending Applications
34
Abandoned Applications
68

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17708627 [patent_doc_number] => 20220208635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => SPACER WITH PATTERN LAYOUT FOR DUAL SIDE COOLING POWER MODULE [patent_app_type] => utility [patent_app_number] => 17/136286 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136286
Spacer with pattern layout for dual side cooling power module Dec 28, 2020 Issued
Array ( [id] => 17692228 [patent_doc_number] => 20220199521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => HIGH ASPECT RATIO VIAS FOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/129971 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/129971
High aspect ratio vias for integrated circuits Dec 21, 2020 Issued
Array ( [id] => 16812162 [patent_doc_number] => 20210134717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/121222 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/121222
Wiring substrate and semiconductor device Dec 13, 2020 Issued
Array ( [id] => 18766957 [patent_doc_number] => 11817366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Semiconductor device package having thermal dissipation feature and method therefor [patent_app_type] => utility [patent_app_number] => 17/113345 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113345 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113345
Semiconductor device package having thermal dissipation feature and method therefor Dec 6, 2020 Issued
Array ( [id] => 16723668 [patent_doc_number] => 20210090815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => HIGHLY STABLE ELECTRONIC DEVICE EMPLOYING HYDROPHOBIC COATING LAYER [patent_app_type] => utility [patent_app_number] => 17/109720 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109720
Highly stable electronic device employing hydrophobic coating layer Dec 1, 2020 Issued
Array ( [id] => 17577933 [patent_doc_number] => 20220134788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => METHOD OF PRODUCING PRINT BOARD [patent_app_type] => utility [patent_app_number] => 17/605436 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17605436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/605436
Method of producing print board Nov 24, 2020 Issued
Array ( [id] => 16723912 [patent_doc_number] => 20210091059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => Multi-Chip Semiconductor Package [patent_app_type] => utility [patent_app_number] => 16/951511 [patent_app_country] => US [patent_app_date] => 2020-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16951511 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/951511
Multi-chip semiconductor package Nov 17, 2020 Issued
Array ( [id] => 18047966 [patent_doc_number] => 11521924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor device with fuse and anti-fuse structures and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/950518 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8862 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950518 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950518
Semiconductor device with fuse and anti-fuse structures and method for forming the same Nov 16, 2020 Issued
Array ( [id] => 17825934 [patent_doc_number] => 11430890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Integrated circuits with channel-strain liner [patent_app_type] => utility [patent_app_number] => 17/099142 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 8463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099142
Integrated circuits with channel-strain liner Nov 15, 2020 Issued
Array ( [id] => 18387252 [patent_doc_number] => 11658045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Method for the production of an electronic arrangement and the electronic arrangement [patent_app_type] => utility [patent_app_number] => 17/094798 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4283 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17094798 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/094798
Method for the production of an electronic arrangement and the electronic arrangement Nov 9, 2020 Issued
Array ( [id] => 16660876 [patent_doc_number] => 20210057513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/089900 [patent_app_country] => US [patent_app_date] => 2020-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17089900 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/089900
Display apparatus Nov 4, 2020 Issued
Array ( [id] => 18759798 [patent_doc_number] => 11810835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Intelligent power module packaging structure [patent_app_type] => utility [patent_app_number] => 17/082030 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2777 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082030 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082030
Intelligent power module packaging structure Oct 27, 2020 Issued
Array ( [id] => 18371841 [patent_doc_number] => 11652023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Semiconductor device including a semiconductor element with a gate electrode on only one surface [patent_app_type] => utility [patent_app_number] => 17/078931 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8202 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/078931
Semiconductor device including a semiconductor element with a gate electrode on only one surface Oct 22, 2020 Issued
Array ( [id] => 18379719 [patent_doc_number] => 20230154808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 17/996888 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17996888 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/996888
Semiconductor apparatus and method for manufacturing semiconductor apparatus Oct 22, 2020 Issued
Array ( [id] => 16936453 [patent_doc_number] => 20210202342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/075795 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17075795 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/075795
Semiconductor device and semiconductor device manufacturing method Oct 20, 2020 Issued
Array ( [id] => 17716594 [patent_doc_number] => 11380592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Techniques and configurations to reduce transistor gate short defects [patent_app_type] => utility [patent_app_number] => 17/069265 [patent_app_country] => US [patent_app_date] => 2020-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7278 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17069265 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/069265
Techniques and configurations to reduce transistor gate short defects Oct 12, 2020 Issued
Array ( [id] => 18008550 [patent_doc_number] => 20220367317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => THERMAL INTERFACE MATERIAL LAYER AND USE THEREOF [patent_app_type] => utility [patent_app_number] => 17/767187 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17767187 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/767187
Thermal interface material layer and use thereof Oct 11, 2020 Issued
Array ( [id] => 16601589 [patent_doc_number] => 20210028120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/068033 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/068033
Semiconductor structure and fabricating method thereof Oct 11, 2020 Issued
Array ( [id] => 19627101 [patent_doc_number] => 12165950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Power semiconductor component and method for producing a power semiconductor component [patent_app_type] => utility [patent_app_number] => 17/768044 [patent_app_country] => US [patent_app_date] => 2020-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2805 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17768044 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/768044
Power semiconductor component and method for producing a power semiconductor component Oct 5, 2020 Issued
Array ( [id] => 17772392 [patent_doc_number] => 11404344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Heat spreading plate [patent_app_type] => utility [patent_app_number] => 17/027683 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3091 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/027683
Heat spreading plate Sep 20, 2020 Issued
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