
Lissi Mojica Marquis
Examiner (ID: 14253)
| Most Active Art Unit | 3104 |
| Art Unit(s) | 3613, 3107, 3614, 3661, 3104, 3105 |
| Total Applications | 667 |
| Issued Applications | 565 |
| Pending Applications | 34 |
| Abandoned Applications | 68 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16067629
[patent_doc_number] => 10692776
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-23
[patent_title] => Formation of VTFET fin and vertical fin profile
[patent_app_type] => utility
[patent_app_number] => 16/181977
[patent_app_country] => US
[patent_app_date] => 2018-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 9605
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16181977
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/181977 | Formation of VTFET fin and vertical fin profile | Nov 5, 2018 | Issued |
Array
(
[id] => 15564245
[patent_doc_number] => 20200066534
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-27
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/181872
[patent_app_country] => US
[patent_app_date] => 2018-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3339
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16181872
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/181872 | Semiconductor device | Nov 5, 2018 | Issued |
Array
(
[id] => 16148101
[patent_doc_number] => 10707127
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-07
[patent_title] => Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors
[patent_app_type] => utility
[patent_app_number] => 16/181914
[patent_app_country] => US
[patent_app_date] => 2018-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 7800
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16181914
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/181914 | Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors | Nov 5, 2018 | Issued |
Array
(
[id] => 14382343
[patent_doc_number] => 20190165084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-30
[patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY
[patent_app_type] => utility
[patent_app_number] => 16/171162
[patent_app_country] => US
[patent_app_date] => 2018-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7871
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16171162
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/171162 | Organic light emitting diode display | Oct 24, 2018 | Issued |
Array
(
[id] => 14938841
[patent_doc_number] => 20190305059
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => PIXEL DEFINITION LAYER, MANUFACTURING METHOD THEREOF, DISPLAY SUBSTRATE AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/165050
[patent_app_country] => US
[patent_app_date] => 2018-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6190
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165050
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/165050 | Pixel definition layer, manufacturing method thereof, display substrate and display device | Oct 18, 2018 | Issued |
Array
(
[id] => 14238811
[patent_doc_number] => 20190131578
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-02
[patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/148274
[patent_app_country] => US
[patent_app_date] => 2018-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6467
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148274
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/148274 | Organic light emitting diode display device | Sep 30, 2018 | Issued |
Array
(
[id] => 15717877
[patent_doc_number] => 20200105706
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-02
[patent_title] => SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING SPACER WITH EMBEDDED SEMICONDUCTOR DIE
[patent_app_type] => utility
[patent_app_number] => 16/145918
[patent_app_country] => US
[patent_app_date] => 2018-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6747
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145918
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/145918 | Semiconductor device assemblies including spacer with embedded semiconductor die | Sep 27, 2018 | Issued |
Array
(
[id] => 16819954
[patent_doc_number] => 11004792
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-11
[patent_title] => Microelectronic device including fiber-containing build-up layers
[patent_app_type] => utility
[patent_app_number] => 16/145804
[patent_app_country] => US
[patent_app_date] => 2018-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7246
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145804
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/145804 | Microelectronic device including fiber-containing build-up layers | Sep 27, 2018 | Issued |
Array
(
[id] => 17107480
[patent_doc_number] => 11127706
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-09-21
[patent_title] => Electronic package with stud bump electrical connections
[patent_app_type] => utility
[patent_app_number] => 16/145999
[patent_app_country] => US
[patent_app_date] => 2018-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 19
[patent_no_of_words] => 4713
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145999
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/145999 | Electronic package with stud bump electrical connections | Sep 27, 2018 | Issued |
Array
(
[id] => 16356626
[patent_doc_number] => 10797144
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-06
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/130432
[patent_app_country] => US
[patent_app_date] => 2018-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 60
[patent_figures_cnt] => 174
[patent_no_of_words] => 14835
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16130432
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/130432 | Semiconductor device | Sep 12, 2018 | Issued |
Array
(
[id] => 15625547
[patent_doc_number] => 20200083178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => Die Features for Self-Alignment During Die Bonding
[patent_app_type] => utility
[patent_app_number] => 16/127769
[patent_app_country] => US
[patent_app_date] => 2018-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5421
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16127769
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/127769 | Die features for self-alignment during die bonding | Sep 10, 2018 | Issued |
Array
(
[id] => 16464144
[patent_doc_number] => 10847505
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-24
[patent_title] => Multi-chip semiconductor package
[patent_app_type] => utility
[patent_app_number] => 16/128034
[patent_app_country] => US
[patent_app_date] => 2018-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 33
[patent_no_of_words] => 8621
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128034
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/128034 | Multi-chip semiconductor package | Sep 10, 2018 | Issued |
Array
(
[id] => 13613469
[patent_doc_number] => 20180358284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-13
[patent_title] => PHASE CHANGING ON-CHIP THERMAL HEAT SINK
[patent_app_type] => utility
[patent_app_number] => 16/107558
[patent_app_country] => US
[patent_app_date] => 2018-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5926
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16107558
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/107558 | Phase changing on-chip thermal heat sink | Aug 20, 2018 | Issued |
Array
(
[id] => 16479830
[patent_doc_number] => 10854787
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-01
[patent_title] => Component having boundary element
[patent_app_type] => utility
[patent_app_number] => 16/052511
[patent_app_country] => US
[patent_app_date] => 2018-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 8533
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052511
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/052511 | Component having boundary element | Jul 31, 2018 | Issued |
Array
(
[id] => 16035263
[patent_doc_number] => 10680065
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-09
[patent_title] => Field-effect transistors with a grown silicon-germanium channel
[patent_app_type] => utility
[patent_app_number] => 16/052140
[patent_app_country] => US
[patent_app_date] => 2018-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3910
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052140
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/052140 | Field-effect transistors with a grown silicon-germanium channel | Jul 31, 2018 | Issued |
Array
(
[id] => 16495743
[patent_doc_number] => 10861793
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-08
[patent_title] => Guard ring frequency tuning
[patent_app_type] => utility
[patent_app_number] => 16/051525
[patent_app_country] => US
[patent_app_date] => 2018-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 4110
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16051525
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/051525 | Guard ring frequency tuning | Jul 31, 2018 | Issued |
Array
(
[id] => 15462397
[patent_doc_number] => 20200044023
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-06
[patent_title] => NANOSHEET SUBSTRATE ISOLATED SOURCE/DRAIN EPITAXY VIA AIRGAP
[patent_app_type] => utility
[patent_app_number] => 16/050735
[patent_app_country] => US
[patent_app_date] => 2018-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7442
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050735
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/050735 | Nanosheet substrate isolated source/drain epitaxy via airgap | Jul 30, 2018 | Issued |
Array
(
[id] => 16202131
[patent_doc_number] => 10727311
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-28
[patent_title] => Method for manufacturing a power semiconductor device having a reduced oxygen concentration
[patent_app_type] => utility
[patent_app_number] => 16/050163
[patent_app_country] => US
[patent_app_date] => 2018-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 8940
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050163
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/050163 | Method for manufacturing a power semiconductor device having a reduced oxygen concentration | Jul 30, 2018 | Issued |
Array
(
[id] => 19169950
[patent_doc_number] => 11985876
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-14
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 17/261261
[patent_app_country] => US
[patent_app_date] => 2018-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 8678
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 290
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17261261
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/261261 | Display device | Jul 19, 2018 | Issued |
Array
(
[id] => 13832969
[patent_doc_number] => 20190019969
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-17
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/031547
[patent_app_country] => US
[patent_app_date] => 2018-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4731
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16031547
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/031547 | DISPLAY DEVICE | Jul 9, 2018 | Abandoned |