Search

Lissi Mojica Marquis

Examiner (ID: 14253)

Most Active Art Unit
3104
Art Unit(s)
3613, 3107, 3614, 3661, 3104, 3105
Total Applications
667
Issued Applications
565
Pending Applications
34
Abandoned Applications
68

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10350917 [patent_doc_number] => 20150235922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'Through Via Structure Extending to Metallization Layer' [patent_app_type] => utility [patent_app_number] => 14/284699 [patent_app_country] => US [patent_app_date] => 2014-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14284699 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/284699
Through via structure extending to metallization layer May 21, 2014 Issued
Array ( [id] => 12417258 [patent_doc_number] => 09972702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Method for non-resist nanolithography [patent_app_type] => utility [patent_app_number] => 14/285281 [patent_app_country] => US [patent_app_date] => 2014-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 6162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14285281 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/285281
Method for non-resist nanolithography May 21, 2014 Issued
Array ( [id] => 10455486 [patent_doc_number] => 20150340501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'FORMING INDEPENDENT-GATE FINFET WITH TILTED PRE-AMORPHIZATION IMPLANTATION AND RESULTING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/285042 [patent_app_country] => US [patent_app_date] => 2014-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14285042 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/285042
FORMING INDEPENDENT-GATE FINFET WITH TILTED PRE-AMORPHIZATION IMPLANTATION AND RESULTING DEVICE May 21, 2014 Abandoned
Array ( [id] => 11360242 [patent_doc_number] => 09536900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-03 [patent_title] => 'Forming fins of different semiconductor materials on the same substrate' [patent_app_type] => utility [patent_app_number] => 14/284820 [patent_app_country] => US [patent_app_date] => 2014-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3963 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14284820 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/284820
Forming fins of different semiconductor materials on the same substrate May 21, 2014 Issued
Array ( [id] => 11776070 [patent_doc_number] => 09385022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Silicon waveguide on bulk silicon substrate and methods of forming' [patent_app_type] => utility [patent_app_number] => 14/283984 [patent_app_country] => US [patent_app_date] => 2014-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 3774 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283984
Silicon waveguide on bulk silicon substrate and methods of forming May 20, 2014 Issued
Array ( [id] => 10455482 [patent_doc_number] => 20150340497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'METHODS OF INCREASING SILICIDE TO EPI CONTACT AREAS AND THE RESULTING DEVICES' [patent_app_type] => utility [patent_app_number] => 14/283636 [patent_app_country] => US [patent_app_date] => 2014-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6490 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283636 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283636
Methods of increasing silicide to epi contact areas and the resulting devices May 20, 2014 Issued
Array ( [id] => 10455453 [patent_doc_number] => 20150340468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'RECESSED CHANNEL FIN DEVICE WITH RAISED SOURCE AND DRAIN REGIONS' [patent_app_type] => utility [patent_app_number] => 14/283721 [patent_app_country] => US [patent_app_date] => 2014-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3446 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283721 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283721
RECESSED CHANNEL FIN DEVICE WITH RAISED SOURCE AND DRAIN REGIONS May 20, 2014 Abandoned
Array ( [id] => 12089000 [patent_doc_number] => 09842733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-12 [patent_title] => 'Method for dissolving chalcogen elements and metal chalcogenides in non-hazardous solvents' [patent_app_type] => utility [patent_app_number] => 14/894987 [patent_app_country] => US [patent_app_date] => 2014-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4706 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14894987 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/894987
Method for dissolving chalcogen elements and metal chalcogenides in non-hazardous solvents May 13, 2014 Issued
Array ( [id] => 10455630 [patent_doc_number] => 20150340645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'OLED DISPLAY PANEL AND PRODUCTION PROCESS THEREOF' [patent_app_type] => utility [patent_app_number] => 14/419166 [patent_app_country] => US [patent_app_date] => 2014-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6352 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14419166 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/419166
OLED display panel and production process thereof Apr 23, 2014 Issued
Array ( [id] => 10294654 [patent_doc_number] => 20150179653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'METHOD AND APPARATUS FOR IMPROVING READ MARGIN FOR AN SRAM BIT-CELL' [patent_app_type] => utility [patent_app_number] => 14/137879 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137879 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137879
Method and apparatus for improving read margin for an SRAM bit-cell Dec 19, 2013 Issued
Array ( [id] => 10294878 [patent_doc_number] => 20150179877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'NANOWIRE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/137856 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9434 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137856 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137856
NANOWIRE DEVICE Dec 19, 2013 Abandoned
Array ( [id] => 10294580 [patent_doc_number] => 20150179579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'COBALT BASED INTERCONNECTS AND METHODS OF FABRICATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/137526 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9760 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137526 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137526
Cobalt based interconnects and methods of fabrication thereof Dec 19, 2013 Issued
Array ( [id] => 10178865 [patent_doc_number] => 09209077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects' [patent_app_type] => utility [patent_app_number] => 14/137588 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 9672 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137588 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137588
Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects Dec 19, 2013 Issued
Array ( [id] => 11796699 [patent_doc_number] => 09406546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Mechanism for FinFET well doping' [patent_app_type] => utility [patent_app_number] => 14/137690 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 8645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137690 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137690
Mechanism for FinFET well doping Dec 19, 2013 Issued
Array ( [id] => 11898401 [patent_doc_number] => 09768345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'LED with current injection confinement trench' [patent_app_type] => utility [patent_app_number] => 14/137847 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 36 [patent_no_of_words] => 15070 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137847 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137847
LED with current injection confinement trench Dec 19, 2013 Issued
Array ( [id] => 10557194 [patent_doc_number] => 09281401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Techniques and configurations to reduce transistor gate short defects' [patent_app_type] => utility [patent_app_number] => 14/137909 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7395 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137909 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137909
Techniques and configurations to reduce transistor gate short defects Dec 19, 2013 Issued
Array ( [id] => 10294769 [patent_doc_number] => 20150179768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'Fin Structure of Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 14/137725 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137725 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137725
Fin structure of semiconductor device Dec 19, 2013 Issued
Array ( [id] => 12953998 [patent_doc_number] => 09837479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Array substrate and fabrication method thereof, display device [patent_app_type] => utility [patent_app_number] => 14/102716 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14102716 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/102716
Array substrate and fabrication method thereof, display device Dec 10, 2013 Issued
Array ( [id] => 9542485 [patent_doc_number] => 20140167132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/103829 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11673 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103829 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103829
Semiconductor device with enhanced discrimination between selected and non-selected memory cells Dec 10, 2013 Issued
Array ( [id] => 11199598 [patent_doc_number] => 09429804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Display device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/103472 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4810 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103472 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103472
Display device and manufacturing method thereof Dec 10, 2013 Issued
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