
Long K. Tran
Examiner (ID: 7591, Phone: (571)272-1797 , Office: P/2829 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818, 2829 |
| Total Applications | 1616 |
| Issued Applications | 1396 |
| Pending Applications | 78 |
| Abandoned Applications | 146 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13582313
[patent_doc_number] => 20180342705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-29
[patent_title] => MANUFACTURING METHOD OF ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL AND ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 15/557130
[patent_app_country] => US
[patent_app_date] => 2017-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5043
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15557130
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/557130 | Manufacturing method of organic light emitting diode display panel and organic light emitting diode display panel | Jul 12, 2017 | Issued |
Array
(
[id] => 13582315
[patent_doc_number] => 20180342706
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-29
[patent_title] => MANUFACTURING METHOD OF ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL AND ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 15/557132
[patent_app_country] => US
[patent_app_date] => 2017-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4628
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15557132
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/557132 | Manufacturing method of organic light emitting diode display panel and organic light emitting diode display panel | Jul 12, 2017 | Issued |
Array
(
[id] => 13893635
[patent_doc_number] => 10199373
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-05
[patent_title] => Method of forming a heterojunction semiconductor device having integrated clamping device
[patent_app_type] => utility
[patent_app_number] => 15/648211
[patent_app_country] => US
[patent_app_date] => 2017-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 11301
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15648211
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/648211 | Method of forming a heterojunction semiconductor device having integrated clamping device | Jul 11, 2017 | Issued |
Array
(
[id] => 13832707
[patent_doc_number] => 20190019838
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-17
[patent_title] => SCALABLE THERMOELECTRIC-BASED INFRARED DETECTOR
[patent_app_type] => utility
[patent_app_number] => 15/647284
[patent_app_country] => US
[patent_app_date] => 2017-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14005
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15647284
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/647284 | Scalable thermoelectric-based infrared detector | Jul 11, 2017 | Issued |
Array
(
[id] => 11983750
[patent_doc_number] => 20170287905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'MONOLITHIC THREE-DIMENSIONAL (3D) ICs WITH LOCAL INTER-LEVEL INTERCONNECTS'
[patent_app_type] => utility
[patent_app_number] => 15/625714
[patent_app_country] => US
[patent_app_date] => 2017-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 11176
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15625714
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/625714 | Monolithic three-dimensional (3D) ICs with local inter-level interconnects | Jun 15, 2017 | Issued |
Array
(
[id] => 14673253
[patent_doc_number] => 10374553
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-06
[patent_title] => Microwave transmitter with improved information throughput
[patent_app_type] => utility
[patent_app_number] => 15/624468
[patent_app_country] => US
[patent_app_date] => 2017-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 8163
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15624468
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/624468 | Microwave transmitter with improved information throughput | Jun 14, 2017 | Issued |
Array
(
[id] => 14367495
[patent_doc_number] => 10305064
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-28
[patent_title] => Flexible organic light emitting diode display and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 15/572540
[patent_app_country] => US
[patent_app_date] => 2017-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3385
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15572540
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/572540 | Flexible organic light emitting diode display and manufacturing method thereof | Jun 8, 2017 | Issued |
Array
(
[id] => 11959388
[patent_doc_number] => 20170263540
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'STACKED CHIP-ON-BOARD MODULE WITH EDGE CONNECTOR'
[patent_app_type] => utility
[patent_app_number] => 15/606134
[patent_app_country] => US
[patent_app_date] => 2017-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 11892
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606134
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/606134 | Stacked chip-on-board module with edge connector | May 25, 2017 | Issued |
Array
(
[id] => 13156159
[patent_doc_number] => 10094797
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-09
[patent_title] => Integrated multi-sensor module
[patent_app_type] => utility
[patent_app_number] => 15/605825
[patent_app_country] => US
[patent_app_date] => 2017-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 6248
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605825
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/605825 | Integrated multi-sensor module | May 24, 2017 | Issued |
Array
(
[id] => 14374853
[patent_doc_number] => 20190161339
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-30
[patent_title] => SYNTHETIC RESIN MOLDED ARTICLE AND METHOD FOR PRODUCING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/097697
[patent_app_country] => US
[patent_app_date] => 2017-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5583
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16097697
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/097697 | Synthetic resin molded article and method for producing the same | May 10, 2017 | Issued |
Array
(
[id] => 14644821
[patent_doc_number] => 10367161
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-30
[patent_title] => System and method for matching electrode resistances in OLED light panels
[patent_app_type] => utility
[patent_app_number] => 15/584354
[patent_app_country] => US
[patent_app_date] => 2017-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 10013
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584354
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/584354 | System and method for matching electrode resistances in OLED light panels | May 1, 2017 | Issued |
Array
(
[id] => 11854851
[patent_doc_number] => 20170229343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-10
[patent_title] => 'SEMICONDUCTOR STRUCTURE WITH RESIST PROTECTIVE OXIDE ON ISOLATION STRUCTURE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/495901
[patent_app_country] => US
[patent_app_date] => 2017-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5541
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495901
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/495901 | Semiconductor structure with resist protective oxide on isolation structure and method of manufacturing the same | Apr 23, 2017 | Issued |
Array
(
[id] => 11854847
[patent_doc_number] => 20170229340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-10
[patent_title] => 'METHOD OF FORMING SHALLOW TRENCH ISOLATION (STI) STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 15/489379
[patent_app_country] => US
[patent_app_date] => 2017-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4318
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15489379
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/489379 | METHOD OF FORMING SHALLOW TRENCH ISOLATION (STI) STRUCTURES | Apr 16, 2017 | Abandoned |
Array
(
[id] => 13514675
[patent_doc_number] => 20180308880
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-25
[patent_title] => MASK FOR MANUFACTURING TFT IN 4M PRODUCTION PROCESS AND TFT ARRAY MANUFACTURING METHOD OF 4M PRODUCTION PROCESS
[patent_app_type] => utility
[patent_app_number] => 15/529506
[patent_app_country] => US
[patent_app_date] => 2017-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3672
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15529506
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/529506 | Mask for manufacturing TFT in 4M production process and TFT array manufacturing method of 4M production process | Apr 13, 2017 | Issued |
Array
(
[id] => 14459975
[patent_doc_number] => 10325961
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-18
[patent_title] => Electroluminescent display, manufacture method thereof, and display device
[patent_app_type] => utility
[patent_app_number] => 15/562875
[patent_app_country] => US
[patent_app_date] => 2017-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15562875
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/562875 | Electroluminescent display, manufacture method thereof, and display device | Apr 10, 2017 | Issued |
Array
(
[id] => 14191385
[patent_doc_number] => 20190115398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-18
[patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 16/090302
[patent_app_country] => US
[patent_app_date] => 2017-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 40278
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 350
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16090302
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/090302 | Display device and manufacturing method therefor | Apr 6, 2017 | Issued |
Array
(
[id] => 11760283
[patent_doc_number] => 20170207152
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-20
[patent_title] => 'Package Structure To Enhance Yield of TMI Interconnections'
[patent_app_type] => utility
[patent_app_number] => 15/478064
[patent_app_country] => US
[patent_app_date] => 2017-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4980
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478064
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/478064 | Package structure to enhance yield of TMI interconnections | Apr 2, 2017 | Issued |
Array
(
[id] => 11746664
[patent_doc_number] => 20170200737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-13
[patent_title] => 'Integrated Structures and Methods of Forming Vertically-Stacked Memory Cells'
[patent_app_type] => utility
[patent_app_number] => 15/472052
[patent_app_country] => US
[patent_app_date] => 2017-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4576
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472052
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/472052 | Integrated structures and methods of forming vertically-stacked memory cells | Mar 27, 2017 | Issued |
Array
(
[id] => 13808499
[patent_doc_number] => 10181518
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-15
[patent_title] => Selective epitaxially grown III-V materials based devices
[patent_app_type] => utility
[patent_app_number] => 15/464888
[patent_app_country] => US
[patent_app_date] => 2017-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 10088
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15464888
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/464888 | Selective epitaxially grown III-V materials based devices | Mar 20, 2017 | Issued |
Array
(
[id] => 11732801
[patent_doc_number] => 20170194244
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-06
[patent_title] => 'VIA, TRENCH OR CONTACT STRUCTURE IN THE METALLIZATION, PREMATALLIZATION DIELECTRIC OR INTERLEVEL DIELECTRIC LAYERS OF AN INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 15/464487
[patent_app_country] => US
[patent_app_date] => 2017-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6191
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15464487
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/464487 | Via, trench or contact structure in the metallization, prematallization dielectric or interlevel dielectric layers of an integrated circuit | Mar 20, 2017 | Issued |