Long K. Tran

Array ( [id] => 11932557 [patent_doc_number] => 09799560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Self-aligned structure' [patent_app_type] => utility [patent_app_number] => 14/853670 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 41 [patent_no_of_words] => 20659 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11876443 [patent_doc_number] => 09748224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Heterojunction semiconductor device having integrated clamping device' [patent_app_type] => utility [patent_app_number] => 14/853720 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 11668 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853720 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11660397 [patent_doc_number] => 09673412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'System and method for matching electrode resistances in OLED light panels' [patent_app_type] => utility [patent_app_number] => 14/852072 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 10237 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14852072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13097013 [patent_doc_number] => 10067847 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-04 [patent_title] => Time-based on-chip hardware performance monitor [patent_app_type] => utility [patent_app_number] => 14/848139 [patent_app_country] => US [patent_app_date] => 2015-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8083 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14848139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10479469 [patent_doc_number] => 20150364486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'SELF-ALIGNED FLOATING GATE IN A VERTICAL MEMORY STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/835922 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7426 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14835922 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11460004 [patent_doc_number] => 20170053910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'Field Effect Transistor Having Loop Distributed Field Effect Transistor Cells' [patent_app_type] => utility [patent_app_number] => 14/830148 [patent_app_country] => US [patent_app_date] => 2015-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3278 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14830148 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11460002 [patent_doc_number] => 20170053909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'FIELD EFFECT TRANSISTOR HAVING TWO-DIMENSIONALLY DISTRIBUTED FIELD EFFECT TRANSISTOR CELLS' [patent_app_type] => utility [patent_app_number] => 14/830142 [patent_app_country] => US [patent_app_date] => 2015-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2396 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14830142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11740409 [patent_doc_number] => 09705005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/828669 [patent_app_country] => US [patent_app_date] => 2015-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 65 [patent_no_of_words] => 33532 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11776352 [patent_doc_number] => 09385311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Semiconductor device and electronic device including the same' [patent_app_type] => utility [patent_app_number] => 14/817031 [patent_app_country] => US [patent_app_date] => 2015-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 6387 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14817031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12936568 [patent_doc_number] => 09831424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Nanoporous metal-oxide memory [patent_app_type] => utility [patent_app_number] => 14/809770 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7430 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14809770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12413145 [patent_doc_number] => 09971322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Lock-out operation for appliances [patent_app_type] => utility [patent_app_number] => 14/806089 [patent_app_country] => US [patent_app_date] => 2015-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14806089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10452427 [patent_doc_number] => 20150337442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'Multi-Wafer Reactor' [patent_app_type] => utility [patent_app_number] => 14/804401 [patent_app_country] => US [patent_app_date] => 2015-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14804401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10617678 [patent_doc_number] => 09337127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Ultra-thin semiconductor device and preparation method thereof' [patent_app_type] => utility [patent_app_number] => 14/805390 [patent_app_country] => US [patent_app_date] => 2015-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 2974 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14805390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11227605 [patent_doc_number] => 09455331 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Method and structure of forming controllable unmerged epitaxial material' [patent_app_type] => utility [patent_app_number] => 14/796646 [patent_app_country] => US [patent_app_date] => 2015-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 11766 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14796646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11227535 [patent_doc_number] => 09455261 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Integrated structures' [patent_app_type] => utility [patent_app_number] => 14/796938 [patent_app_country] => US [patent_app_date] => 2015-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4576 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14796938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11385868 [patent_doc_number] => 20170011925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'SEMICONDUCTOR STRUCTURE WITH RESIST PROTECTIVE OXIDE ON ISOLATION STRUCTURE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/795751 [patent_app_country] => US [patent_app_date] => 2015-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5506 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14795751 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10604281 [patent_doc_number] => 09324853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'III-V semiconductor device having self-aligned contacts' [patent_app_type] => utility [patent_app_number] => 14/793772 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7136 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11412393 [patent_doc_number] => 09559712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures' [patent_app_type] => utility [patent_app_number] => 14/793476 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 61 [patent_no_of_words] => 14528 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11194494 [patent_doc_number] => 09425313 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-23 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/793632 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4396 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10645481 [patent_doc_number] => 09362358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Spatial semiconductor structure' [patent_app_type] => utility [patent_app_number] => 14/792638 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2305 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792638 [rel_patent_id] =>[rel_patent_doc_number] =>)