Search

Long K. Tran

Examiner (ID: 16014)

Most Active Art Unit
2818
Art Unit(s)
2818, 2829
Total Applications
1616
Issued Applications
1396
Pending Applications
78
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11232000 [patent_doc_number] => 09459224 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-10-04 [patent_title] => 'Gas sensor, integrated circuit device using the same, and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/788352 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 5404 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14788352 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/788352
Gas sensor, integrated circuit device using the same, and manufacturing method thereof Jun 29, 2015 Issued
Array ( [id] => 11367192 [patent_doc_number] => 20170005173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'Fully-Depleted SOI MOSFET with U-Shaped Channel' [patent_app_type] => utility [patent_app_number] => 14/788253 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7430 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14788253 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/788253
Fully-depleted SOI MOSFET with U-shaped channel Jun 29, 2015 Issued
Array ( [id] => 11286539 [patent_doc_number] => 09502399 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-22 [patent_title] => 'Diode string circuit configurations with improved parasitic silicon-controlled rectifier (SCR) conduction during electrostatic discharge (ESD) events' [patent_app_type] => utility [patent_app_number] => 14/752236 [patent_app_country] => US [patent_app_date] => 2015-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4691 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14752236 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/752236
Diode string circuit configurations with improved parasitic silicon-controlled rectifier (SCR) conduction during electrostatic discharge (ESD) events Jun 25, 2015 Issued
Array ( [id] => 11776160 [patent_doc_number] => 09385112 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-05 [patent_title] => 'Semiconductor devices' [patent_app_type] => utility [patent_app_number] => 14/746306 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5020 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746306 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/746306
Semiconductor devices Jun 21, 2015 Issued
Array ( [id] => 10472405 [patent_doc_number] => 20150357421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'WAFER STRENGTH BY CONTROL OF UNIFORMITY OF EDGE BULK MICRO DEFECTS' [patent_app_type] => utility [patent_app_number] => 14/745600 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14745600 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/745600
Wafer strength by control of uniformity of edge bulk micro defects Jun 21, 2015 Issued
Array ( [id] => 10402822 [patent_doc_number] => 20150287832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/744261 [patent_app_country] => US [patent_app_date] => 2015-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14744261 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/744261
Semiconductor device and method of manufacturing semiconductor device Jun 18, 2015 Issued
Array ( [id] => 11353661 [patent_doc_number] => 20160372401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'PHOTO PATTERN METHOD TO INCREASE VIA ETCHING RATE' [patent_app_type] => utility [patent_app_number] => 14/741087 [patent_app_country] => US [patent_app_date] => 2015-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14741087 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/741087
Photo pattern method to increase via etching rate Jun 15, 2015 Issued
Array ( [id] => 11776256 [patent_doc_number] => 09385212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/725666 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5794 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725666 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/725666
Method for manufacturing semiconductor device May 28, 2015 Issued
Array ( [id] => 11466719 [patent_doc_number] => 09583358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Hardmask composition and method of forming pattern by using the hardmask composition' [patent_app_type] => utility [patent_app_number] => 14/725390 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 14091 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725390 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/725390
Hardmask composition and method of forming pattern by using the hardmask composition May 28, 2015 Issued
Array ( [id] => 10472171 [patent_doc_number] => 20150357187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'MODIFICATION PROCESSING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/725656 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10193 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725656 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/725656
Modification processing method and method of manufacturing semiconductor device May 28, 2015 Issued
Array ( [id] => 11781707 [patent_doc_number] => 09390907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Film forming method of SiCN film' [patent_app_type] => utility [patent_app_number] => 14/725147 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6161 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725147 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/725147
Film forming method of SiCN film May 28, 2015 Issued
Array ( [id] => 11315390 [patent_doc_number] => 20160351500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'VIA, TRENCH OR CONTACT STRUCTURE IN THE METALLIZATION, PREMETALLIZATION DIELECTRIC OR INTERLEVEL DIELECTRIC LAYERS OF AN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/724975 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6026 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14724975 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/724975
Via, trench or contact structure in the metallization, premetallization dielectric or interlevel dielectric layers of an integrated circuit May 28, 2015 Issued
Array ( [id] => 10479640 [patent_doc_number] => 20150364657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/724715 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2114 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14724715 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/724715
METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE May 27, 2015 Abandoned
Array ( [id] => 10557013 [patent_doc_number] => 09281217 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-08 [patent_title] => 'Method of manufacturing semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/724517 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4081 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14724517 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/724517
Method of manufacturing semiconductor memory device May 27, 2015 Issued
Array ( [id] => 11286457 [patent_doc_number] => 09502317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Method for manufacturing light emitting device' [patent_app_type] => utility [patent_app_number] => 14/724658 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 2888 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14724658 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/724658
Method for manufacturing light emitting device May 27, 2015 Issued
Array ( [id] => 10364014 [patent_doc_number] => 20150249019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'Methods and Apparatus of Packaging with Interposers' [patent_app_type] => utility [patent_app_number] => 14/713222 [patent_app_country] => US [patent_app_date] => 2015-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14713222 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/713222
Methods and apparatus of packaging with interposers May 14, 2015 Issued
Array ( [id] => 10351053 [patent_doc_number] => 20150236058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'IMAGE SENSOR PIXEL CELL WITH SWITCHED DEEP TRENCH ISOLATION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/704493 [patent_app_country] => US [patent_app_date] => 2015-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4099 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14704493 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/704493
Image sensor pixel cell with switched deep trench isolation structure May 4, 2015 Issued
Array ( [id] => 10431660 [patent_doc_number] => 20150316672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'DETERMINISTIC PHASE CORRECTION AND APPLICATION' [patent_app_type] => utility [patent_app_number] => 14/698156 [patent_app_country] => US [patent_app_date] => 2015-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7059 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14698156 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/698156
Deterministic phase correction and application Apr 27, 2015 Issued
Array ( [id] => 10343561 [patent_doc_number] => 20150228566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'HIGH PIN COUNT, SMALL PACKAGES HAVING HEAT-DISSIPATING PAD' [patent_app_type] => utility [patent_app_number] => 14/692283 [patent_app_country] => US [patent_app_date] => 2015-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4792 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14692283 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/692283
High pin count, small packages having heat-dissipating pad Apr 20, 2015 Issued
Array ( [id] => 10336638 [patent_doc_number] => 20150221643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING SOURCE/DRAIN EPITAXIAL OVERGROWTH FOR FORMING SELF-ALIGNED CONTACTS WITHOUT SPACER LOSS AND A SEMICONDUCTOR DEVICE FORMED BY SAME' [patent_app_type] => utility [patent_app_number] => 14/686260 [patent_app_country] => US [patent_app_date] => 2015-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14686260 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/686260
Method of manufacturing a semiconductor device using source/drain epitaxial overgrowth for forming self-aligned contacts without spacer loss and a semiconductor device formed by same Apr 13, 2015 Issued
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