
Long K. Tran
Examiner (ID: 7591, Phone: (571)272-1797 , Office: P/2829 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818, 2829 |
| Total Applications | 1616 |
| Issued Applications | 1396 |
| Pending Applications | 78 |
| Abandoned Applications | 146 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10418270
[patent_doc_number] => 20150303281
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-22
[patent_title] => 'FINFET DEVICE WITH VERTICAL SILICIDE ON RECESSED SOURCE/DRAIN EPITAXY REGIONS'
[patent_app_type] => utility
[patent_app_number] => 14/583454
[patent_app_country] => US
[patent_app_date] => 2014-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9281
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583454
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/583454 | FinFET device with vertical silicide on recessed source/drain epitaxy regions | Dec 25, 2014 | Issued |
Array
(
[id] => 11353664
[patent_doc_number] => 20160372404
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'INTEGRATED PACKAGE DESIGN WITH WIRE LEADS FOR PACKAGE-ON-PACKAGE PRODUCT'
[patent_app_type] => utility
[patent_app_number] => 14/777411
[patent_app_country] => US
[patent_app_date] => 2014-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5093
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14777411
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/777411 | Integrated package design with wire leads for package-on-package product | Dec 22, 2014 | Issued |
Array
(
[id] => 11911392
[patent_doc_number] => 09780214
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-03
[patent_title] => 'Semiconductor device including Fin- FET and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/579708
[patent_app_country] => US
[patent_app_date] => 2014-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 6887
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579708
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/579708 | Semiconductor device including Fin- FET and manufacturing method thereof | Dec 21, 2014 | Issued |
Array
(
[id] => 11321758
[patent_doc_number] => 09520507
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-13
[patent_title] => 'Solar cells with improved lifetime, passivation and/or efficiency'
[patent_app_type] => utility
[patent_app_number] => 14/579935
[patent_app_country] => US
[patent_app_date] => 2014-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 5482
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579935
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/579935 | Solar cells with improved lifetime, passivation and/or efficiency | Dec 21, 2014 | Issued |
Array
(
[id] => 10525815
[patent_doc_number] => 09252337
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-02-02
[patent_title] => 'Composite substrate for light emitting diodes'
[patent_app_type] => utility
[patent_app_number] => 14/579937
[patent_app_country] => US
[patent_app_date] => 2014-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 5469
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579937
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/579937 | Composite substrate for light emitting diodes | Dec 21, 2014 | Issued |
Array
(
[id] => 10603331
[patent_doc_number] => 09323899
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-26
[patent_title] => 'Method and device for audio recording'
[patent_app_type] => utility
[patent_app_number] => 14/576236
[patent_app_country] => US
[patent_app_date] => 2014-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 7694
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14576236
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/576236 | Method and device for audio recording | Dec 18, 2014 | Issued |
Array
(
[id] => 13528233
[patent_doc_number] => 20180315659
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-01
[patent_title] => INTEGRATED CIRCUIT DIE HAVING REDUCED DEFECT GROUP III-NITRIDE STRUCTURES AND METHODS ASSOCIATED THEREWITH
[patent_app_type] => utility
[patent_app_number] => 15/528031
[patent_app_country] => US
[patent_app_date] => 2014-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9474
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15528031
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/528031 | Integrated circuit die having reduced defect group III-nitride structures and methods associated therewith | Dec 16, 2014 | Issued |
Array
(
[id] => 11799946
[patent_doc_number] => 09540743
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-10
[patent_title] => 'Amorphous silicon crystallizing method, crystallized silicon film forming method, semiconductor device manufacturing method and film forming apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/566069
[patent_app_country] => US
[patent_app_date] => 2014-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 6741
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14566069
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/566069 | Amorphous silicon crystallizing method, crystallized silicon film forming method, semiconductor device manufacturing method and film forming apparatus | Dec 9, 2014 | Issued |
Array
(
[id] => 10826088
[patent_doc_number] => 20160172256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-16
[patent_title] => 'Detection of Lost Wafer from Spinning Chuck'
[patent_app_type] => utility
[patent_app_number] => 14/566109
[patent_app_country] => US
[patent_app_date] => 2014-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5292
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14566109
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/566109 | Detection of lost wafer from spinning chuck | Dec 9, 2014 | Issued |
Array
(
[id] => 10537989
[patent_doc_number] => 09263627
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-16
[patent_title] => 'Method and structure for receiving a micro device'
[patent_app_type] => utility
[patent_app_number] => 14/563763
[patent_app_country] => US
[patent_app_date] => 2014-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 29
[patent_no_of_words] => 10010
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563763
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/563763 | Method and structure for receiving a micro device | Dec 7, 2014 | Issued |
Array
(
[id] => 9931540
[patent_doc_number] => 20150079732
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-19
[patent_title] => 'Flat Panel Display Device with Oxide Thin Film Transistors and Method for Fabricating the Same'
[patent_app_type] => utility
[patent_app_number] => 14/553706
[patent_app_country] => US
[patent_app_date] => 2014-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8778
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14553706
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/553706 | Flat panel display device with oxide thin film transistors and method for fabricating the same | Nov 24, 2014 | Issued |
Array
(
[id] => 11466915
[patent_doc_number] => 09583556
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-28
[patent_title] => 'Process-compatible decoupling capacitor and method for making the same'
[patent_app_type] => utility
[patent_app_number] => 14/552117
[patent_app_country] => US
[patent_app_date] => 2014-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 5148
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14552117
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/552117 | Process-compatible decoupling capacitor and method for making the same | Nov 23, 2014 | Issued |
Array
(
[id] => 11466915
[patent_doc_number] => 09583556
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-28
[patent_title] => 'Process-compatible decoupling capacitor and method for making the same'
[patent_app_type] => utility
[patent_app_number] => 14/552117
[patent_app_country] => US
[patent_app_date] => 2014-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 5148
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14552117
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/552117 | Process-compatible decoupling capacitor and method for making the same | Nov 23, 2014 | Issued |
Array
(
[id] => 14597945
[patent_doc_number] => 10352160
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-16
[patent_title] => Method of estimating uncontaminated fluid properties during sampling
[patent_app_type] => utility
[patent_app_number] => 14/538403
[patent_app_country] => US
[patent_app_date] => 2014-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 7403
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538403
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/538403 | Method of estimating uncontaminated fluid properties during sampling | Nov 10, 2014 | Issued |
Array
(
[id] => 10245003
[patent_doc_number] => 20150129998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-14
[patent_title] => 'METHODS FOR MANUFACTURING CARBON RIBBONS FOR MAGNETIC DEVICES'
[patent_app_type] => utility
[patent_app_number] => 14/538423
[patent_app_country] => US
[patent_app_date] => 2014-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 2540
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538423
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/538423 | Methods for manufacturing carbon ribbons for magnetic devices | Nov 10, 2014 | Issued |
Array
(
[id] => 11876626
[patent_doc_number] => 09748408
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-29
[patent_title] => 'High-voltage semiconductor device and method of producing the same'
[patent_app_type] => utility
[patent_app_number] => 15/038447
[patent_app_country] => US
[patent_app_date] => 2014-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4507
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15038447
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/038447 | High-voltage semiconductor device and method of producing the same | Nov 3, 2014 | Issued |
Array
(
[id] => 11253148
[patent_doc_number] => 09478663
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-10-25
[patent_title] => 'FinFET device including a uniform silicon alloy fin'
[patent_app_type] => utility
[patent_app_number] => 14/526617
[patent_app_country] => US
[patent_app_date] => 2014-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3706
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14526617
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/526617 | FinFET device including a uniform silicon alloy fin | Oct 28, 2014 | Issued |
Array
(
[id] => 9855009
[patent_doc_number] => 20150035026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-05
[patent_title] => 'MIDDLE-OF-LINE BORDERLESS CONTACT STRUCTURE AND METHOD OF FORMING'
[patent_app_type] => utility
[patent_app_number] => 14/519622
[patent_app_country] => US
[patent_app_date] => 2014-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4027
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14519622
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/519622 | Middle of-line borderless contact structure and method of forming | Oct 20, 2014 | Issued |
Array
(
[id] => 9857915
[patent_doc_number] => 20150037933
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-05
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/515792
[patent_app_country] => US
[patent_app_date] => 2014-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 28245
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14515792
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/515792 | Semiconductor device and method for manufacturing the same | Oct 15, 2014 | Issued |
Array
(
[id] => 11259441
[patent_doc_number] => 09484346
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-01
[patent_title] => 'Semiconductor structure and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/514874
[patent_app_country] => US
[patent_app_date] => 2014-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 6300
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14514874
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/514874 | Semiconductor structure and manufacturing method thereof | Oct 14, 2014 | Issued |