Search

Long K. Tran

Examiner (ID: 7591, Phone: (571)272-1797 , Office: P/2829 )

Most Active Art Unit
2818
Art Unit(s)
2818, 2829
Total Applications
1616
Issued Applications
1396
Pending Applications
78
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5989377 [patent_doc_number] => 20110012244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'Semiconductor Chip Package' [patent_app_type] => utility [patent_app_number] => 12/889680 [patent_app_country] => US [patent_app_date] => 2010-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6121 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20110012244.pdf [firstpage_image] =>[orig_patent_app_number] => 12889680 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/889680
Semiconductor chip package Sep 23, 2010 Issued
Array ( [id] => 7741957 [patent_doc_number] => 08106490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Semiconductor chip package' [patent_app_type] => utility [patent_app_number] => 12/889662 [patent_app_country] => US [patent_app_date] => 2010-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 6136 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/106/08106490.pdf [firstpage_image] =>[orig_patent_app_number] => 12889662 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/889662
Semiconductor chip package Sep 23, 2010 Issued
Array ( [id] => 8164271 [patent_doc_number] => 08173494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Thin film transistor array and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/890324 [patent_app_country] => US [patent_app_date] => 2010-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 6130 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/173/08173494.pdf [firstpage_image] =>[orig_patent_app_number] => 12890324 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/890324
Thin film transistor array and method of manufacturing the same Sep 23, 2010 Issued
Array ( [id] => 7503306 [patent_doc_number] => 08034682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Power device with trenches having wider upper portion than lower portion' [patent_app_type] => utility [patent_app_number] => 12/884072 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3842 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/034/08034682.pdf [firstpage_image] =>[orig_patent_app_number] => 12884072 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884072
Power device with trenches having wider upper portion than lower portion Sep 15, 2010 Issued
Array ( [id] => 8217331 [patent_doc_number] => 20120132991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'ORGANIC THIN-FILM TRANSISTOR, AND PROCESS FOR PRODUCTION THEREOF' [patent_app_type] => utility [patent_app_number] => 13/389235 [patent_app_country] => US [patent_app_date] => 2010-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17017 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13389235 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/389235
ORGANIC THIN-FILM TRANSISTOR, AND PROCESS FOR PRODUCTION THEREOF Sep 1, 2010 Abandoned
Array ( [id] => 6588126 [patent_doc_number] => 20100321991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'Chalcogenide Devices Exhibiting Stable Operation from the As-Fabricated State' [patent_app_type] => utility [patent_app_number] => 12/871975 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20100321991.pdf [firstpage_image] =>[orig_patent_app_number] => 12871975 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871975
Chalcogenide Devices Exhibiting Stable Operation from the As-Fabricated State Aug 30, 2010 Abandoned
Array ( [id] => 6609625 [patent_doc_number] => 20100323468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'METHOD OF FABRICATING IMAGE SENSOR PHOTODIODES USING A MULTI-LAYER SUBSTRATE AND CONTACT METHOD AND THE STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/872856 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4501 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20100323468.pdf [firstpage_image] =>[orig_patent_app_number] => 12872856 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872856
Method of fabricating image sensor photodiodes using a multi-layer substrate and contact method and the structure thereof Aug 30, 2010 Issued
Array ( [id] => 4612838 [patent_doc_number] => 07989264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Warpage resistant semiconductor package and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/848472 [patent_app_country] => US [patent_app_date] => 2010-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3264 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989264.pdf [firstpage_image] =>[orig_patent_app_number] => 12848472 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/848472
Warpage resistant semiconductor package and method for manufacturing the same Aug 1, 2010 Issued
Array ( [id] => 7750281 [patent_doc_number] => 20120025199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'Image Sensor with Deep Trench Isolation Structure' [patent_app_type] => utility [patent_app_number] => 12/844642 [patent_app_country] => US [patent_app_date] => 2010-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5897 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025199.pdf [firstpage_image] =>[orig_patent_app_number] => 12844642 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844642
Image sensor with deep trench isolation structure Jul 26, 2010 Issued
Array ( [id] => 7750477 [patent_doc_number] => 20120025311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'RADIATION-HARDENED SEMICONDUCTOR STRUCTURE, A SEMICONDUCTOR DEVICE INCLUDING THE RADIATION-HARDENED SEMICODUCTOR STRUCTURE, AND METHODS OF FORMING THE RADIATION-HARDENED SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/844684 [patent_app_country] => US [patent_app_date] => 2010-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025311.pdf [firstpage_image] =>[orig_patent_app_number] => 12844684 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844684
Methods of forming radiation-hardened semiconductor structures Jul 26, 2010 Issued
Array ( [id] => 7750298 [patent_doc_number] => 20120025209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'OPTICAL CONNECTION THROUGH SINGLE ASSEMBLY OVERHANG FLIP CHIP OPTICS DIE WITH MICRO STRUCTURE ALIGNMENT' [patent_app_type] => utility [patent_app_number] => 12/844656 [patent_app_country] => US [patent_app_date] => 2010-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025209.pdf [firstpage_image] =>[orig_patent_app_number] => 12844656 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844656
Optical connection through single assembly overhang flip chip optics die with micro structure alignment Jul 26, 2010 Issued
Array ( [id] => 7750611 [patent_doc_number] => 20120025387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'CHIP PACKAGE AND FABRICATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/844590 [patent_app_country] => US [patent_app_date] => 2010-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025387.pdf [firstpage_image] =>[orig_patent_app_number] => 12844590 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844590
Chip package and fabricating method thereof Jul 26, 2010 Issued
Array ( [id] => 7750490 [patent_doc_number] => 20120025319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'STRUCTURE AND METHOD FOR MAKING METAL SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) WITH ISOLATION LAST PROCESS' [patent_app_type] => utility [patent_app_number] => 12/844478 [patent_app_country] => US [patent_app_date] => 2010-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025319.pdf [firstpage_image] =>[orig_patent_app_number] => 12844478 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844478
Structure and method for making metal semiconductor field effect transistor (MOSFET) with isolation last process Jul 26, 2010 Issued
Array ( [id] => 8572232 [patent_doc_number] => 08338882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Semiconductor memory device and method for manufacturing same' [patent_app_type] => utility [patent_app_number] => 12/841662 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 54 [patent_no_of_words] => 7369 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12841662 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841662
Semiconductor memory device and method for manufacturing same Jul 21, 2010 Issued
Array ( [id] => 8738171 [patent_doc_number] => 08409941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/841406 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4034 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12841406 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841406
Semiconductor device and method for manufacturing the same Jul 21, 2010 Issued
Array ( [id] => 5948585 [patent_doc_number] => 20110031628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'SEMICONDUCTOR DEVICE MODULE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE MODULE' [patent_app_type] => utility [patent_app_number] => 12/841495 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20110031628.pdf [firstpage_image] =>[orig_patent_app_number] => 12841495 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841495
SEMICONDUCTOR DEVICE MODULE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE MODULE Jul 21, 2010 Abandoned
Array ( [id] => 7738731 [patent_doc_number] => 20120018730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'STRUCTURE AND METHOD FOR STRESS LATCHING IN NON-PLANAR SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 12/841408 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7785 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20120018730.pdf [firstpage_image] =>[orig_patent_app_number] => 12841408 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841408
Structure and method for stress latching in non-planar semiconductor devices Jul 21, 2010 Issued
Array ( [id] => 5972696 [patent_doc_number] => 20110068449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/841653 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7723 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20110068449.pdf [firstpage_image] =>[orig_patent_app_number] => 12841653 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841653
Semiconductor package and method of manufacturing the semiconductor package Jul 21, 2010 Issued
Array ( [id] => 6184047 [patent_doc_number] => 20110169097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'CMOSFET DEVICE WITH CONTROLLED THRESHOLD VOLTAGE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/937444 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3334 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20110169097.pdf [firstpage_image] =>[orig_patent_app_number] => 12937444 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/937444
CMOSFET device with controlled threshold voltage and method of fabricating the same Jun 23, 2010 Issued
Array ( [id] => 6484697 [patent_doc_number] => 20100258910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'LATERAL JUNCTION VARACTOR WITH LARGE TUNING RANGE' [patent_app_type] => utility [patent_app_number] => 12/819228 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3980 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20100258910.pdf [firstpage_image] =>[orig_patent_app_number] => 12819228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819228
Lateral junction varactor with large tuning range Jun 20, 2010 Issued
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