Search

Long K. Tran

Examiner (ID: 16014)

Most Active Art Unit
2818
Art Unit(s)
2818, 2829
Total Applications
1616
Issued Applications
1396
Pending Applications
78
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15906535 [patent_doc_number] => 20200152788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => DRAIN EXTENDED TRANSISTOR WITH TRENCH GATE [patent_app_type] => utility [patent_app_number] => 16/185679 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185679 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185679
Drain extended transistor with trench gate Nov 8, 2018 Issued
Array ( [id] => 15906427 [patent_doc_number] => 20200152734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => NANOSHEET FIELD-EFFECT TRANSISTOR WITH SUBSTRATE ISOLATION [patent_app_type] => utility [patent_app_number] => 16/185881 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185881 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185881
Nanosheet field-effect transistor with substrate isolation Nov 8, 2018 Issued
Array ( [id] => 16464145 [patent_doc_number] => 10847506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Method for fabricating high-efficiency micro-LED module [patent_app_type] => utility [patent_app_number] => 16/185979 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5857 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185979 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185979
Method for fabricating high-efficiency micro-LED module Nov 8, 2018 Issued
Array ( [id] => 16959124 [patent_doc_number] => 11063007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Semiconductor device and method of manufacture [patent_app_type] => utility [patent_app_number] => 16/185749 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 12902 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185749
Semiconductor device and method of manufacture Nov 8, 2018 Issued
Array ( [id] => 16218653 [patent_doc_number] => 10734476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Integrated electronic device including an edge termination structure with a plurality of diode chains [patent_app_type] => utility [patent_app_number] => 16/186421 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6346 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186421 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186421
Integrated electronic device including an edge termination structure with a plurality of diode chains Nov 8, 2018 Issued
Array ( [id] => 16502579 [patent_doc_number] => 10867977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Display device and method for producing a display device [patent_app_type] => utility [patent_app_number] => 16/186395 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 7244 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186395 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186395
Display device and method for producing a display device Nov 8, 2018 Issued
Array ( [id] => 15905995 [patent_doc_number] => 20200152518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => INTEGRATED GATE CONTACT AND CROSS-COUPLING CONTACT FORMATION [patent_app_type] => utility [patent_app_number] => 16/185675 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185675 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185675
Integrated gate contact and cross-coupling contact formation Nov 8, 2018 Issued
Array ( [id] => 14049927 [patent_doc_number] => 20190081071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => Integrated Structures and Methods of Forming Vertically-Stacked Memory Cells [patent_app_type] => utility [patent_app_number] => 16/184907 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184907 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184907
Integrated structures and methods of forming vertically-stacked memory cells Nov 7, 2018 Issued
Array ( [id] => 16308818 [patent_doc_number] => 10777629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Display apparatus and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/172259 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9624 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172259 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172259
Display apparatus and method for manufacturing the same Oct 25, 2018 Issued
Array ( [id] => 16148597 [patent_doc_number] => 10707380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Light-emitting diode [patent_app_type] => utility [patent_app_number] => 16/147763 [patent_app_country] => US [patent_app_date] => 2018-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4559 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147763 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147763
Light-emitting diode Sep 29, 2018 Issued
Array ( [id] => 16339339 [patent_doc_number] => 10790308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Field-effect transistor, display element, image display device, and system [patent_app_type] => utility [patent_app_number] => 16/131593 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 12451 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16131593 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/131593
Field-effect transistor, display element, image display device, and system Sep 13, 2018 Issued
Array ( [id] => 15200411 [patent_doc_number] => 10497708 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-03 [patent_title] => Memory structure and forming method thereof [patent_app_type] => utility [patent_app_number] => 16/128520 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128520 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128520
Memory structure and forming method thereof Sep 11, 2018 Issued
Array ( [id] => 14425119 [patent_doc_number] => 10317357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Integrated multi-sensor module [patent_app_type] => utility [patent_app_number] => 16/128076 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6256 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128076 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128076
Integrated multi-sensor module Sep 10, 2018 Issued
Array ( [id] => 13786083 [patent_doc_number] => 20190006580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => MAGNETIC MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/125764 [patent_app_country] => US [patent_app_date] => 2018-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125764
MAGNETIC MEMORY DEVICE Sep 8, 2018 Abandoned
Array ( [id] => 16187009 [patent_doc_number] => 10720345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-21 [patent_title] => Wafer to wafer bonding with low wafer distortion [patent_app_type] => utility [patent_app_number] => 16/125248 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 13462 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125248 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125248
Wafer to wafer bonding with low wafer distortion Sep 6, 2018 Issued
Array ( [id] => 14049713 [patent_doc_number] => 20190080964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/124637 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16124637 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/124637
Method of manufacturing a semiconductor device Sep 6, 2018 Issued
Array ( [id] => 14050187 [patent_doc_number] => 20190081201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => METHOD OF MANUFACTURING A LIGHT EMITTING ELEMENT [patent_app_type] => utility [patent_app_number] => 16/125240 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125240
Method of manufacturing a light emitting element Sep 6, 2018 Issued
Array ( [id] => 15857189 [patent_doc_number] => 10643891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Via structures and via patterning using oblique angle deposition processes [patent_app_type] => utility [patent_app_number] => 16/124786 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2402 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16124786 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/124786
Via structures and via patterning using oblique angle deposition processes Sep 6, 2018 Issued
Array ( [id] => 16148217 [patent_doc_number] => 10707186 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-07 [patent_title] => Compliant layer for wafer to wafer bonding [patent_app_type] => utility [patent_app_number] => 16/125261 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8708 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125261 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125261
Compliant layer for wafer to wafer bonding Sep 6, 2018 Issued
Array ( [id] => 15231803 [patent_doc_number] => 10503624 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-10 [patent_title] => Time-based on-chip hardware performance monitor [patent_app_type] => utility [patent_app_number] => 16/118002 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8133 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118002 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118002
Time-based on-chip hardware performance monitor Aug 29, 2018 Issued
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