
Long Pham
Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763 |
| Total Applications | 3774 |
| Issued Applications | 3306 |
| Pending Applications | 160 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7198908
[patent_doc_number] => 20050051901
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-10
[patent_title] => 'Memory device with discrete layers of phase change memory material'
[patent_app_type] => utility
[patent_app_number] => 10/656668
[patent_app_country] => US
[patent_app_date] => 2003-09-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0051/20050051901.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/656668 | Memory device with discrete layers of phase change memory material | Sep 3, 2003 | Issued |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2008-10-28
[patent_title] => 'Post passivation interconnection schemes on top of the IC chips'
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Array
(
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Array
(
[id] => 7301181
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[patent_issue_date] => 2004-06-17
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => new
[patent_app_number] => 10/605019
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 10605019
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Array
(
[id] => 7203857
[patent_doc_number] => 20040087109
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[patent_title] => 'Method for direct bonding two silicon wafers for minimising interfacial oxide and stresses at the bond interface, and an SOI structure'
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[patent_app_number] => 10/651180
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[pdf_file] => publications/A1/0087/20040087109.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/651180 | Method for direct bonding two silicon wafers for minimising interfacial oxide and stresses at the bond interface, and an SOI structure | Aug 28, 2003 | Issued |
Array
(
[id] => 972699
[patent_doc_number] => 06936920
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[patent_issue_date] => 2005-08-30
[patent_title] => 'Voltage contrast monitor for integrated circuit defects'
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[pdf_file] => patents/06/936/06936920.pdf
[firstpage_image] =>[orig_patent_app_number] => 10652369
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/652369 | Voltage contrast monitor for integrated circuit defects | Aug 28, 2003 | Issued |
Array
(
[id] => 703098
[patent_doc_number] => 07064397
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-06-20
[patent_title] => 'Silicon controlled rectifier structure with improved punch through resistance'
[patent_app_type] => utility
[patent_app_number] => 10/649989
[patent_app_country] => US
[patent_app_date] => 2003-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/07/064/07064397.pdf
[firstpage_image] =>[orig_patent_app_number] => 10649989
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/649989 | Silicon controlled rectifier structure with improved punch through resistance | Aug 26, 2003 | Issued |
Array
(
[id] => 7080491
[patent_doc_number] => 20050045871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Vertical tunneling transistor'
[patent_app_type] => utility
[patent_app_number] => 10/649058
[patent_app_country] => US
[patent_app_date] => 2003-08-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/649058 | Vertical tunneling transistor | Aug 26, 2003 | Issued |
Array
(
[id] => 7395064
[patent_doc_number] => 20040038481
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-26
[patent_title] => 'Trench MOSFET having implanted drain-drift region and process for manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/650513 | Trench MOSFET having implanted drain-drift region and process for manufacturing the same | Aug 26, 2003 | Abandoned |
Array
(
[id] => 7612818
[patent_doc_number] => 06903017
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[patent_issue_date] => 2005-06-07
[patent_title] => 'Integrated circuit metallization using a titanium/aluminum alloy'
[patent_app_type] => utility
[patent_app_number] => 10/648735
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/648735 | Integrated circuit metallization using a titanium/aluminum alloy | Aug 25, 2003 | Issued |
Array
(
[id] => 7080597
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[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'REPEATED STRUCTURE OF NANOMETER THIN FILMS WITH SYMMETRIC OR ASYMMETRIC CONFIGURATION FOR SPR SIGNAL MODULATION'
[patent_app_type] => utility
[patent_app_number] => 10/647229
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[pdf_file] => publications/A1/0045/20050045977.pdf
[firstpage_image] =>[orig_patent_app_number] => 10647229
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/647229 | Repeated structure of nanometer thin films with symmetric or asymmetric configuration for SPR signal modulation | Aug 25, 2003 | Issued |
Array
(
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Array
(
[id] => 1108902
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[patent_title] => 'Photoconductor on active pixel image sensor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/648129 | Photoconductor on active pixel image sensor | Aug 25, 2003 | Issued |
Array
(
[id] => 1002691
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[patent_title] => 'Semiconductor thin film and its manufacturing method and semiconductor device and its manufacturing method'
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Array
(
[id] => 7441009
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[patent_title] => 'Hybrid solid state/electrochemical photoelectrode for hyrodrogen production'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/647409 | Hybrid solid state/electrochemical photoelectrode for hydrogen production | Aug 24, 2003 | Issued |
Array
(
[id] => 7191010
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/645552 | Imaging with gate controlled charge storage | Aug 21, 2003 | Issued |
Array
(
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[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING MOSFET HAVING BAND-ENGINEERED SUPERLATTICE'
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Array
(
[id] => 1040542
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/645399 | Compensated-well electrostatic discharge protection devices | Aug 20, 2003 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/642575 | Semiconductor thin film and semiconductor device | Aug 18, 2003 | Issued |