Search

Long Pham

Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763
Total Applications
3774
Issued Applications
3306
Pending Applications
160
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1044216 [patent_doc_number] => 06867508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Method and apparatus for fabricating semiconductor laser device' [patent_app_type] => utility [patent_app_number] => 10/134534 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 6655 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867508.pdf [firstpage_image] =>[orig_patent_app_number] => 10134534 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/134534
Method and apparatus for fabricating semiconductor laser device Apr 29, 2002 Issued
Array ( [id] => 1323905 [patent_doc_number] => 06602727 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Scatterometry based active control of exposure conditions' [patent_app_type] => B1 [patent_app_number] => 10/133874 [patent_app_country] => US [patent_app_date] => 2002-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 6804 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602727.pdf [firstpage_image] =>[orig_patent_app_number] => 10133874 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/133874
Scatterometry based active control of exposure conditions Apr 25, 2002 Issued
Array ( [id] => 1354051 [patent_doc_number] => 06576487 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Method to distinguish an STI outer edge current component with an STI normal current component' [patent_app_type] => B1 [patent_app_number] => 10/126363 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 3386 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/576/06576487.pdf [firstpage_image] =>[orig_patent_app_number] => 10126363 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126363
Method to distinguish an STI outer edge current component with an STI normal current component Apr 18, 2002 Issued
10/123528 Method of preventing seam defects in isolated lines Apr 16, 2002 Abandoned
Array ( [id] => 1305923 [patent_doc_number] => 06621113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-16 [patent_title] => 'Self-aligned shallow trench isolation' [patent_app_type] => B2 [patent_app_number] => 10/122585 [patent_app_country] => US [patent_app_date] => 2002-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2585 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/621/06621113.pdf [firstpage_image] =>[orig_patent_app_number] => 10122585 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/122585
Self-aligned shallow trench isolation Apr 14, 2002 Issued
Array ( [id] => 6688488 [patent_doc_number] => 20030032213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/117345 [patent_app_country] => US [patent_app_date] => 2002-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 22276 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032213.pdf [firstpage_image] =>[orig_patent_app_number] => 10117345 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117345
Method of manufacturing a semiconductor device Apr 7, 2002 Issued
Array ( [id] => 6688523 [patent_doc_number] => 20030032248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Method of fabricating trench MIS device with graduated gate oxide layer' [patent_app_type] => new [patent_app_number] => 10/106896 [patent_app_country] => US [patent_app_date] => 2002-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 5205 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032248.pdf [firstpage_image] =>[orig_patent_app_number] => 10106896 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106896
Method of fabricating trench MIS device with graduated gate oxide layer Mar 25, 2002 Issued
Array ( [id] => 6529547 [patent_doc_number] => 20020192849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Low diode feedback' [patent_app_type] => new [patent_app_number] => 10/105098 [patent_app_country] => US [patent_app_date] => 2002-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8668 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20020192849.pdf [firstpage_image] =>[orig_patent_app_number] => 10105098 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105098
Low diode feedback Mar 21, 2002 Abandoned
Array ( [id] => 754269 [patent_doc_number] => 07018879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Method of making an ultrathin silicon dioxide gate with improved dielectric properties using NH3 nitridation and post-deposition rapid thermal annealing' [patent_app_type] => utility [patent_app_number] => 10/102414 [patent_app_country] => US [patent_app_date] => 2002-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5507 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/018/07018879.pdf [firstpage_image] =>[orig_patent_app_number] => 10102414 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/102414
Method of making an ultrathin silicon dioxide gate with improved dielectric properties using NH3 nitridation and post-deposition rapid thermal annealing Mar 19, 2002 Issued
Array ( [id] => 1175032 [patent_doc_number] => 06746903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Method for forming crystalline semiconductor layers, a method for fabricating thin film transistors, and a method for fabricating solar cells and active matrix liquid crystal devices' [patent_app_type] => B2 [patent_app_number] => 10/099963 [patent_app_country] => US [patent_app_date] => 2002-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 22247 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/746/06746903.pdf [firstpage_image] =>[orig_patent_app_number] => 10099963 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099963
Method for forming crystalline semiconductor layers, a method for fabricating thin film transistors, and a method for fabricating solar cells and active matrix liquid crystal devices Mar 18, 2002 Issued
Array ( [id] => 1570217 [patent_doc_number] => 06498070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-24 [patent_title] => 'Air gap semiconductor structure and method of manufacture' [patent_app_type] => B2 [patent_app_number] => 10/100895 [patent_app_country] => US [patent_app_date] => 2002-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/498/06498070.pdf [firstpage_image] =>[orig_patent_app_number] => 10100895 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/100895
Air gap semiconductor structure and method of manufacture Mar 17, 2002 Issued
Array ( [id] => 6797166 [patent_doc_number] => 20030176040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Evaporation of Y-Si-O films for medium-k dielectrics' [patent_app_type] => new [patent_app_number] => 10/099194 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5367 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20030176040.pdf [firstpage_image] =>[orig_patent_app_number] => 10099194 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099194
Evaporation of Y-Si-O films for medium-k dielectrics Mar 12, 2002 Issued
Array ( [id] => 694693 [patent_doc_number] => 07071037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/086628 [patent_app_country] => US [patent_app_date] => 2002-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 49 [patent_no_of_words] => 12058 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071037.pdf [firstpage_image] =>[orig_patent_app_number] => 10086628 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/086628
Semiconductor device and manufacturing method thereof Mar 3, 2002 Issued
Array ( [id] => 1517233 [patent_doc_number] => 06500711 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Fabrication method for an interpoly dielectric layer' [patent_app_type] => B1 [patent_app_number] => 10/078034 [patent_app_country] => US [patent_app_date] => 2002-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2393 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/500/06500711.pdf [firstpage_image] =>[orig_patent_app_number] => 10078034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/078034
Fabrication method for an interpoly dielectric layer Feb 14, 2002 Issued
Array ( [id] => 6706437 [patent_doc_number] => 20030153171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Wafer level package with air pads and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/073173 [patent_app_country] => US [patent_app_date] => 2002-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20030153171.pdf [firstpage_image] =>[orig_patent_app_number] => 10073173 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/073173
Wafer level package with air pads and manufacturing method thereof Feb 12, 2002 Issued
Array ( [id] => 1009353 [patent_doc_number] => 06900115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Deposition over mixed substrates' [patent_app_type] => utility [patent_app_number] => 10/074633 [patent_app_country] => US [patent_app_date] => 2002-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 9699 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900115.pdf [firstpage_image] =>[orig_patent_app_number] => 10074633 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/074633
Deposition over mixed substrates Feb 10, 2002 Issued
Array ( [id] => 5906774 [patent_doc_number] => 20020142546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Two mask floating gate EEPROM and method of making' [patent_app_type] => new [patent_app_number] => 10/066376 [patent_app_country] => US [patent_app_date] => 2002-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7552 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20020142546.pdf [firstpage_image] =>[orig_patent_app_number] => 10066376 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/066376
Two mask floating gate EEPROM and method of making Feb 4, 2002 Issued
Array ( [id] => 1528140 [patent_doc_number] => 06479383 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Method for selective removal of unreacted metal after silicidation' [patent_app_type] => B1 [patent_app_number] => 10/068823 [patent_app_country] => US [patent_app_date] => 2002-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4208 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/479/06479383.pdf [firstpage_image] =>[orig_patent_app_number] => 10068823 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/068823
Method for selective removal of unreacted metal after silicidation Feb 4, 2002 Issued
Array ( [id] => 6409215 [patent_doc_number] => 20020182845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Method of filling a concave portion with an insulating material' [patent_app_type] => new [patent_app_number] => 10/059174 [patent_app_country] => US [patent_app_date] => 2002-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7199 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20020182845.pdf [firstpage_image] =>[orig_patent_app_number] => 10059174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/059174
Method of filling a concave portion with an insulating material Jan 30, 2002 Abandoned
Array ( [id] => 6659672 [patent_doc_number] => 20030134463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Method for fabricating a high voltage device' [patent_app_type] => new [patent_app_number] => 10/058673 [patent_app_country] => US [patent_app_date] => 2002-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20030134463.pdf [firstpage_image] =>[orig_patent_app_number] => 10058673 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/058673
Method for fabricating a high voltage device Jan 27, 2002 Abandoned
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