
Long Pham
Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763 |
| Total Applications | 3774 |
| Issued Applications | 3306 |
| Pending Applications | 160 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1044216
[patent_doc_number] => 06867508
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-15
[patent_title] => 'Method and apparatus for fabricating semiconductor laser device'
[patent_app_type] => utility
[patent_app_number] => 10/134534
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 25
[patent_no_of_words] => 6655
[patent_no_of_claims] => 9
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/867/06867508.pdf
[firstpage_image] =>[orig_patent_app_number] => 10134534
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/134534 | Method and apparatus for fabricating semiconductor laser device | Apr 29, 2002 | Issued |
Array
(
[id] => 1323905
[patent_doc_number] => 06602727
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-05
[patent_title] => 'Scatterometry based active control of exposure conditions'
[patent_app_type] => B1
[patent_app_number] => 10/133874
[patent_app_country] => US
[patent_app_date] => 2002-04-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/602/06602727.pdf
[firstpage_image] =>[orig_patent_app_number] => 10133874
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/133874 | Scatterometry based active control of exposure conditions | Apr 25, 2002 | Issued |
Array
(
[id] => 1354051
[patent_doc_number] => 06576487
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-06-10
[patent_title] => 'Method to distinguish an STI outer edge current component with an STI normal current component'
[patent_app_type] => B1
[patent_app_number] => 10/126363
[patent_app_country] => US
[patent_app_date] => 2002-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/06/576/06576487.pdf
[firstpage_image] =>[orig_patent_app_number] => 10126363
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/126363 | Method to distinguish an STI outer edge current component with an STI normal current component | Apr 18, 2002 | Issued |
| 10/123528 | Method of preventing seam defects in isolated lines | Apr 16, 2002 | Abandoned |
Array
(
[id] => 1305923
[patent_doc_number] => 06621113
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-16
[patent_title] => 'Self-aligned shallow trench isolation'
[patent_app_type] => B2
[patent_app_number] => 10/122585
[patent_app_country] => US
[patent_app_date] => 2002-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[firstpage_image] =>[orig_patent_app_number] => 10122585
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/122585 | Self-aligned shallow trench isolation | Apr 14, 2002 | Issued |
Array
(
[id] => 6688488
[patent_doc_number] => 20030032213
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[patent_issue_date] => 2003-02-13
[patent_title] => 'Method of manufacturing a semiconductor device'
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[pdf_file] => publications/A1/0032/20030032213.pdf
[firstpage_image] =>[orig_patent_app_number] => 10117345
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/117345 | Method of manufacturing a semiconductor device | Apr 7, 2002 | Issued |
Array
(
[id] => 6688523
[patent_doc_number] => 20030032248
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[patent_kind] => A1
[patent_issue_date] => 2003-02-13
[patent_title] => 'Method of fabricating trench MIS device with graduated gate oxide layer'
[patent_app_type] => new
[patent_app_number] => 10/106896
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/106896 | Method of fabricating trench MIS device with graduated gate oxide layer | Mar 25, 2002 | Issued |
Array
(
[id] => 6529547
[patent_doc_number] => 20020192849
[patent_country] => US
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[patent_issue_date] => 2002-12-19
[patent_title] => 'Low diode feedback'
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[patent_app_number] => 10/105098
[patent_app_country] => US
[patent_app_date] => 2002-03-22
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[pdf_file] => publications/A1/0192/20020192849.pdf
[firstpage_image] =>[orig_patent_app_number] => 10105098
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/105098 | Low diode feedback | Mar 21, 2002 | Abandoned |
Array
(
[id] => 754269
[patent_doc_number] => 07018879
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-28
[patent_title] => 'Method of making an ultrathin silicon dioxide gate with improved dielectric properties using NH3 nitridation and post-deposition rapid thermal annealing'
[patent_app_type] => utility
[patent_app_number] => 10/102414
[patent_app_country] => US
[patent_app_date] => 2002-03-20
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/102414 | Method of making an ultrathin silicon dioxide gate with improved dielectric properties using NH3 nitridation and post-deposition rapid thermal annealing | Mar 19, 2002 | Issued |
Array
(
[id] => 1175032
[patent_doc_number] => 06746903
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[patent_issue_date] => 2004-06-08
[patent_title] => 'Method for forming crystalline semiconductor layers, a method for fabricating thin film transistors, and a method for fabricating solar cells and active matrix liquid crystal devices'
[patent_app_type] => B2
[patent_app_number] => 10/099963
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/099963 | Method for forming crystalline semiconductor layers, a method for fabricating thin film transistors, and a method for fabricating solar cells and active matrix liquid crystal devices | Mar 18, 2002 | Issued |
Array
(
[id] => 1570217
[patent_doc_number] => 06498070
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-12-24
[patent_title] => 'Air gap semiconductor structure and method of manufacture'
[patent_app_type] => B2
[patent_app_number] => 10/100895
[patent_app_country] => US
[patent_app_date] => 2002-03-18
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[firstpage_image] =>[orig_patent_app_number] => 10100895
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/100895 | Air gap semiconductor structure and method of manufacture | Mar 17, 2002 | Issued |
Array
(
[id] => 6797166
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[patent_issue_date] => 2003-09-18
[patent_title] => 'Evaporation of Y-Si-O films for medium-k dielectrics'
[patent_app_type] => new
[patent_app_number] => 10/099194
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/099194 | Evaporation of Y-Si-O films for medium-k dielectrics | Mar 12, 2002 | Issued |
Array
(
[id] => 694693
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[patent_title] => 'Semiconductor device and manufacturing method thereof'
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Array
(
[id] => 1517233
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[patent_title] => 'Fabrication method for an interpoly dielectric layer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/078034 | Fabrication method for an interpoly dielectric layer | Feb 14, 2002 | Issued |
Array
(
[id] => 6706437
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[patent_issue_date] => 2003-08-14
[patent_title] => 'Wafer level package with air pads and manufacturing method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/073173 | Wafer level package with air pads and manufacturing method thereof | Feb 12, 2002 | Issued |
Array
(
[id] => 1009353
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[patent_title] => 'Deposition over mixed substrates'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/074633 | Deposition over mixed substrates | Feb 10, 2002 | Issued |
Array
(
[id] => 5906774
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[patent_title] => 'Two mask floating gate EEPROM and method of making'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/066376 | Two mask floating gate EEPROM and method of making | Feb 4, 2002 | Issued |
Array
(
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[patent_title] => 'Method for selective removal of unreacted metal after silicidation'
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/058673 | Method for fabricating a high voltage device | Jan 27, 2002 | Abandoned |