
Long Pham
Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763 |
| Total Applications | 3774 |
| Issued Applications | 3306 |
| Pending Applications | 160 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4145661
[patent_doc_number] => 06063671
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-16
[patent_title] => 'Method of forming a high-voltage device'
[patent_app_type] => 1
[patent_app_number] => 9/204137
[patent_app_country] => US
[patent_app_date] => 1998-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2998
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[pdf_file] => patents/06/063/06063671.pdf
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Array
(
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[patent_doc_number] => 06165858
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[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Enhanced silicidation formation for high speed MOS device by junction grading with dual implant dopant species'
[patent_app_type] => 1
[patent_app_number] => 9/200143
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[patent_app_date] => 1998-11-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/200143 | Enhanced silicidation formation for high speed MOS device by junction grading with dual implant dopant species | Nov 24, 1998 | Issued |
Array
(
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[patent_issue_date] => 2000-11-21
[patent_title] => 'Insulation layer structure and method for making the same'
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[patent_app_country] => US
[patent_app_date] => 1998-11-19
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Array
(
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[patent_issue_date] => 2001-01-09
[patent_title] => 'Method of manufacturing a semiconductor device comprising a field effect transistor'
[patent_app_type] => 1
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[patent_app_country] => US
[patent_app_date] => 1998-11-19
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Array
(
[id] => 4354867
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[patent_issue_date] => 2001-03-13
[patent_title] => 'Method for forming shallow trench isolation'
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[firstpage_image] =>[orig_patent_app_number] => 192877
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/192877 | Method for forming shallow trench isolation | Nov 15, 1998 | Issued |
Array
(
[id] => 3999532
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[patent_issue_date] => 1999-09-07
[patent_title] => 'Method for fabricating a metal-oxide semiconductor transistor'
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[firstpage_image] =>[orig_patent_app_number] => 193217
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/193217 | Method for fabricating a metal-oxide semiconductor transistor | Nov 15, 1998 | Issued |
Array
(
[id] => 3957123
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[patent_title] => 'Methods of forming a field effect transistor and method of forming CMOS circuitry'
[patent_app_type] => 1
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[pdf_file] => patents/05/930/05930616.pdf
[firstpage_image] =>[orig_patent_app_number] => 192635
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/192635 | Methods of forming a field effect transistor and method of forming CMOS circuitry | Nov 15, 1998 | Issued |
Array
(
[id] => 4070313
[patent_doc_number] => 06069020
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-30
[patent_title] => 'Method of manufacturing semiconductor light-emitting device'
[patent_app_type] => 1
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[patent_app_country] => US
[patent_app_date] => 1998-11-13
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[pdf_file] => patents/06/069/06069020.pdf
[firstpage_image] =>[orig_patent_app_number] => 189680
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/189680 | Method of manufacturing semiconductor light-emitting device | Nov 12, 1998 | Issued |
Array
(
[id] => 4408416
[patent_doc_number] => 06265286
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[patent_kind] => NA
[patent_issue_date] => 2001-07-24
[patent_title] => 'Planarization of LOCOS through recessed reoxidation techniques'
[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 190747
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Array
(
[id] => 4292236
[patent_doc_number] => 06180476
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[patent_issue_date] => 2001-01-30
[patent_title] => 'Dual amorphization implant process for ultra-shallow drain and source extensions'
[patent_app_type] => 1
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Array
(
[id] => 4269460
[patent_doc_number] => 06245601
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Photoelectric converter, method for driving photoelectric converter and system having photoelectric converter'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/185717 | Photoelectric converter, method for driving photoelectric converter and system having photoelectric converter | Nov 3, 1998 | Issued |
Array
(
[id] => 4080670
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[patent_title] => 'OTP (open trigger path) latchup scheme using buried-diode for sub-quarter micron transistors'
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Array
(
[id] => 4155145
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[patent_title] => 'Epitaxial channel vertical MOS transistor'
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[firstpage_image] =>[orig_patent_app_number] => 183040
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/183040 | Epitaxial channel vertical MOS transistor | Oct 29, 1998 | Issued |
Array
(
[id] => 3943709
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[patent_title] => 'Method for making liquid crystal display device with reduced mask steps'
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Array
(
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Array
(
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Array
(
[id] => 4141519
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Array
(
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/162450 | Method of manufacturing transistor | Sep 28, 1998 | Issued |