
Long Pham
Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763 |
| Total Applications | 3774 |
| Issued Applications | 3306 |
| Pending Applications | 160 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3506010
[patent_doc_number] => 05569611
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-29
[patent_title] => 'Method of manufacturing a bipolar transistor operating at low temperature'
[patent_app_type] => 1
[patent_app_number] => 8/330361
[patent_app_country] => US
[patent_app_date] => 1994-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 5969
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/569/05569611.pdf
[firstpage_image] =>[orig_patent_app_number] => 330361
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/330361 | Method of manufacturing a bipolar transistor operating at low temperature | Oct 11, 1994 | Issued |
Array
(
[id] => 3681679
[patent_doc_number] => 05633179
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-27
[patent_title] => 'Method of forming silicon/silicon-germanium heterojunction bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 8/320815
[patent_app_country] => US
[patent_app_date] => 1994-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 34
[patent_no_of_words] => 6671
[patent_no_of_claims] => 12
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[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/633/05633179.pdf
[firstpage_image] =>[orig_patent_app_number] => 320815
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/320815 | Method of forming silicon/silicon-germanium heterojunction bipolar transistor | Oct 10, 1994 | Issued |
Array
(
[id] => 3417332
[patent_doc_number] => 05434091
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-18
[patent_title] => 'Method for making collector up bipolar transistors having reducing junction capacitance and increasing current gain'
[patent_app_type] => 1
[patent_app_number] => 8/320792
[patent_app_country] => US
[patent_app_date] => 1994-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 22
[patent_no_of_words] => 2188
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/434/05434091.pdf
[firstpage_image] =>[orig_patent_app_number] => 320792
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/320792 | Method for making collector up bipolar transistors having reducing junction capacitance and increasing current gain | Oct 6, 1994 | Issued |
Array
(
[id] => 3694349
[patent_doc_number] => 05661047
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Method for forming bipolar ROM device'
[patent_app_type] => 1
[patent_app_number] => 8/318213
[patent_app_country] => US
[patent_app_date] => 1994-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3837
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/661/05661047.pdf
[firstpage_image] =>[orig_patent_app_number] => 318213
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/318213 | Method for forming bipolar ROM device | Oct 4, 1994 | Issued |
Array
(
[id] => 3453063
[patent_doc_number] => 05451533
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-19
[patent_title] => 'Bidirectional blocking lateral MOSFET with improved on-resistance'
[patent_app_type] => 1
[patent_app_number] => 8/318323
[patent_app_country] => US
[patent_app_date] => 1994-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 6250
[patent_no_of_claims] => 8
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[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/451/05451533.pdf
[firstpage_image] =>[orig_patent_app_number] => 318323
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/318323 | Bidirectional blocking lateral MOSFET with improved on-resistance | Oct 4, 1994 | Issued |
Array
(
[id] => 3726790
[patent_doc_number] => 05670394
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Method of making bipolar transistor having amorphous silicon contact as emitter diffusion source'
[patent_app_type] => 1
[patent_app_number] => 8/317155
[patent_app_country] => US
[patent_app_date] => 1994-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 13
[patent_no_of_words] => 4838
[patent_no_of_claims] => 12
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/670/05670394.pdf
[firstpage_image] =>[orig_patent_app_number] => 317155
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/317155 | Method of making bipolar transistor having amorphous silicon contact as emitter diffusion source | Oct 2, 1994 | Issued |
| 08/315431 | GAAS-INGAAS HIGH ELECTRON MOBILITY TRANSISTOR | Sep 29, 1994 | Abandoned |
Array
(
[id] => 3556520
[patent_doc_number] => 05501992
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-26
[patent_title] => 'Method of manufacturing bipolar transistor having ring-shaped emitter and base'
[patent_app_type] => 1
[patent_app_number] => 8/313571
[patent_app_country] => US
[patent_app_date] => 1994-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 8651
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 507
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/501/05501992.pdf
[firstpage_image] =>[orig_patent_app_number] => 313571
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/313571 | Method of manufacturing bipolar transistor having ring-shaped emitter and base | Sep 26, 1994 | Issued |
Array
(
[id] => 7634844
[patent_doc_number] => 06656774
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-02
[patent_title] => 'Method to enhance operating characteristics of FET, IGBT, and MCT structures'
[patent_app_type] => B1
[patent_app_number] => 08/310041
[patent_app_country] => US
[patent_app_date] => 1994-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5706
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 33
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/656/06656774.pdf
[firstpage_image] =>[orig_patent_app_number] => 08310041
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/310041 | Method to enhance operating characteristics of FET, IGBT, and MCT structures | Sep 21, 1994 | Issued |
Array
(
[id] => 3622333
[patent_doc_number] => 05602054
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-11
[patent_title] => 'Method for formation of a well in a dielectrically isolated island'
[patent_app_type] => 1
[patent_app_number] => 8/309573
[patent_app_country] => US
[patent_app_date] => 1994-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3052
[patent_no_of_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/602/05602054.pdf
[firstpage_image] =>[orig_patent_app_number] => 309573
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/309573 | Method for formation of a well in a dielectrically isolated island | Sep 20, 1994 | Issued |
Array
(
[id] => 3592295
[patent_doc_number] => 05488002
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-30
[patent_title] => 'Method for manufacturing self-aligned bipolar transistors using double diffusion'
[patent_app_type] => 1
[patent_app_number] => 8/302199
[patent_app_country] => US
[patent_app_date] => 1994-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 5642
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/488/05488002.pdf
[firstpage_image] =>[orig_patent_app_number] => 302199
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/302199 | Method for manufacturing self-aligned bipolar transistors using double diffusion | Sep 7, 1994 | Issued |
Array
(
[id] => 3558399
[patent_doc_number] => 05500377
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-19
[patent_title] => 'Method of making surge suppressor switching device'
[patent_app_type] => 1
[patent_app_number] => 8/300905
[patent_app_country] => US
[patent_app_date] => 1994-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1258
[patent_no_of_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/500/05500377.pdf
[firstpage_image] =>[orig_patent_app_number] => 300905
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/300905 | Method of making surge suppressor switching device | Sep 5, 1994 | Issued |
Array
(
[id] => 3480400
[patent_doc_number] => 05457062
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-10
[patent_title] => 'Method for forming gigaohm load for BiCMOS process'
[patent_app_type] => 1
[patent_app_number] => 8/300580
[patent_app_country] => US
[patent_app_date] => 1994-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/457/05457062.pdf
[firstpage_image] =>[orig_patent_app_number] => 300580
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/300580 | Method for forming gigaohm load for BiCMOS process | Sep 1, 1994 | Issued |
Array
(
[id] => 3517316
[patent_doc_number] => 05506152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-09
[patent_title] => 'Method of making silicon controlled rectifier with a variable base-shunt resistance'
[patent_app_type] => 1
[patent_app_number] => 8/299717
[patent_app_country] => US
[patent_app_date] => 1994-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 3339
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/506/05506152.pdf
[firstpage_image] =>[orig_patent_app_number] => 299717
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/299717 | Method of making silicon controlled rectifier with a variable base-shunt resistance | Aug 31, 1994 | Issued |
Array
(
[id] => 3412176
[patent_doc_number] => 05443999
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-22
[patent_title] => 'Method of fabricating a flash control device which uses cascade-connected thyristor and MOSFET'
[patent_app_type] => 1
[patent_app_number] => 8/298955
[patent_app_country] => US
[patent_app_date] => 1994-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/443/05443999.pdf
[firstpage_image] =>[orig_patent_app_number] => 298955
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/298955 | Method of fabricating a flash control device which uses cascade-connected thyristor and MOSFET | Aug 31, 1994 | Issued |
Array
(
[id] => 3587932
[patent_doc_number] => 05516730
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-14
[patent_title] => 'Pre-thermal treatment cleaning process of wafers'
[patent_app_type] => 1
[patent_app_number] => 8/296537
[patent_app_country] => US
[patent_app_date] => 1994-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
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[pdf_file] => patents/05/516/05516730.pdf
[firstpage_image] =>[orig_patent_app_number] => 296537
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/296537 | Pre-thermal treatment cleaning process of wafers | Aug 25, 1994 | Issued |
Array
(
[id] => 3106285
[patent_doc_number] => 05418179
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-23
[patent_title] => 'Process of fabricating complementary inverter circuit having multi-level interconnection'
[patent_app_type] => 1
[patent_app_number] => 8/291728
[patent_app_country] => US
[patent_app_date] => 1994-08-16
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/418/05418179.pdf
[firstpage_image] =>[orig_patent_app_number] => 291728
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/291728 | Process of fabricating complementary inverter circuit having multi-level interconnection | Aug 15, 1994 | Issued |
Array
(
[id] => 3481932
[patent_doc_number] => 05445976
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-29
[patent_title] => 'Method for producing bipolar transistor having reduced base-collector capacitance'
[patent_app_type] => 1
[patent_app_number] => 8/287741
[patent_app_country] => US
[patent_app_date] => 1994-08-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/445/05445976.pdf
[firstpage_image] =>[orig_patent_app_number] => 287741
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/287741 | Method for producing bipolar transistor having reduced base-collector capacitance | Aug 8, 1994 | Issued |
Array
(
[id] => 3694339
[patent_doc_number] => 05661046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Method of fabricating BiCMOS device'
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[patent_app_country] => US
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[pdf_file] => patents/05/661/05661046.pdf
[firstpage_image] =>[orig_patent_app_number] => 285839
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/285839 | Method of fabricating BiCMOS device | Aug 3, 1994 | Issued |
Array
(
[id] => 3660211
[patent_doc_number] => 05648288
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-15
[patent_title] => 'Threshold adjustment in field effect semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/281314
[patent_app_country] => US
[patent_app_date] => 1994-07-27
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/648/05648288.pdf
[firstpage_image] =>[orig_patent_app_number] => 281314
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/281314 | Threshold adjustment in field effect semiconductor devices | Jul 26, 1994 | Issued |