| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_kind] => NA
[patent_issue_date] => 1996-04-09
[patent_title] => 'Method of fabricating bipolar transistor having high speed and MOS transistor having small size'
[patent_app_type] => 1
[patent_app_number] => 8/279087
[patent_app_country] => US
[patent_app_date] => 1994-07-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/279087 | Method of fabricating bipolar transistor having high speed and MOS transistor having small size | Jul 21, 1994 | Issued |
| 08/273253 | ATTACHING HEAT SINKS DIRECTLY TO CHIP CARRIER MODULES USING FLEXIBLE-EPOXY | Jul 10, 1994 | Abandoned |
Array
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[patent_doc_number] => 05459096
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[patent_kind] => NA
[patent_issue_date] => 1995-10-17
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Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-24
[patent_title] => 'Two step etch back spin-on-glass process for semiconductor planarization'
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Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-31
[patent_title] => 'Process for manufacturing semiconductor BICMOS device'
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[patent_app_number] => 8/254223
[patent_app_country] => US
[patent_app_date] => 1994-06-06
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Array
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[patent_kind] => NA
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Array
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Array
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[firstpage_image] =>[orig_patent_app_number] => 248409
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/248409 | Method for forming solder bumps in semiconductor devices | May 23, 1994 | Issued |
Array
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[patent_doc_number] => 05489547
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[patent_issue_date] => 1996-02-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/247443 | Method of fabricating semiconductor device having polysilicon resistor with low temperature coefficient | May 22, 1994 | Issued |
Array
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Array
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Array
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Array
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[id] => 3428339
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| 08/239435 | LOW VOLTAGE CMOS PROCESS AND DEVICE WITH INDIVIDUALLY ADJUSTABLE LDD SPACERS | May 5, 1994 | Abandoned |
Array
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[id] => 3444038
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Array
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