Long Pham

Array ( [id] => 3425385 [patent_doc_number] => 05416046 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-16 [patent_title] => 'Method for making semiconductor heat-cooling device having a supporting mesh' [patent_app_type] => 1 [patent_app_number] => 8/183073 [patent_app_country] => US [patent_app_date] => 1994-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1296 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/416/05416046.pdf [firstpage_image] =>[orig_patent_app_number] => 183073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3521846 [patent_doc_number] => 05489539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-06 [patent_title] => 'Method of making quantum well structure with self-aligned gate' [patent_app_type] => 1 [patent_app_number] => 8/179177 [patent_app_country] => US [patent_app_date] => 1994-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 46 [patent_no_of_words] => 7663 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/489/05489539.pdf [firstpage_image] =>[orig_patent_app_number] => 179177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3447680 [patent_doc_number] => 05451175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Method of fabricating electronic device employing field emission devices with dis-similar electron emission characteristics' [patent_app_type] => 1 [patent_app_number] => 8/177898 [patent_app_country] => US [patent_app_date] => 1994-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3004 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/451/05451175.pdf [firstpage_image] =>[orig_patent_app_number] => 177898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3515444 [patent_doc_number] => 05576250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Process for the production of accelerometers using silicon on insulator technology' [patent_app_type] => 1 [patent_app_number] => 8/172827 [patent_app_country] => US [patent_app_date] => 1993-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 24 [patent_no_of_words] => 8212 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576250.pdf [firstpage_image] =>[orig_patent_app_number] => 172827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3112401 [patent_doc_number] => 05395800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Method for assembling semiconductor devices with lead frame containing common lead arrangement' [patent_app_type] => 1 [patent_app_number] => 8/172493 [patent_app_country] => US [patent_app_date] => 1993-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2172 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/395/05395800.pdf [firstpage_image] =>[orig_patent_app_number] => 172493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3570002 [patent_doc_number] => 05522957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Method for leak detection in etching chambers' [patent_app_type] => 1 [patent_app_number] => 8/171491 [patent_app_country] => US [patent_app_date] => 1993-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6367 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/522/05522957.pdf [firstpage_image] =>[orig_patent_app_number] => 171491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3448145 [patent_doc_number] => 05424249 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-13 [patent_title] => 'Method of making mold-packaged pressure sensing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/167485 [patent_app_country] => US [patent_app_date] => 1993-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2982 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/424/05424249.pdf [firstpage_image] =>[orig_patent_app_number] => 167485 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3710476 [patent_doc_number] => 05669316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Turntable for rotating a wafer carrier' [patent_app_type] => 1 [patent_app_number] => 8/166182 [patent_app_country] => US [patent_app_date] => 1993-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2930 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/669/05669316.pdf [firstpage_image] =>[orig_patent_app_number] => 166182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3410506 [patent_doc_number] => 05461009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-24 [patent_title] => 'Method of fabricating high uniformity field emission display' [patent_app_type] => 1 [patent_app_number] => 8/162954 [patent_app_country] => US [patent_app_date] => 1993-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2764 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/461/05461009.pdf [firstpage_image] =>[orig_patent_app_number] => 162954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3460803 [patent_doc_number] => 05468658 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Method of making multilayer base heterojunction device having one of base layer as a diffusion barrier between base-emitter junction' [patent_app_type] => 1 [patent_app_number] => 8/164641 [patent_app_country] => US [patent_app_date] => 1993-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2305 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/468/05468658.pdf [firstpage_image] =>[orig_patent_app_number] => 164641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3561331 [patent_doc_number] => 05525547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'Method of fabricating a molded semiconductor device having blocking banks between leads' [patent_app_type] => 1 [patent_app_number] => 8/161374 [patent_app_country] => US [patent_app_date] => 1993-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 4951 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/525/05525547.pdf [firstpage_image] =>[orig_patent_app_number] => 161374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3563182 [patent_doc_number] => 05484507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-16 [patent_title] => 'Self compensating process for aligning an aperture with crystal planes in a substrate' [patent_app_type] => 1 [patent_app_number] => 8/160531 [patent_app_country] => US [patent_app_date] => 1993-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1948 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/484/05484507.pdf [firstpage_image] =>[orig_patent_app_number] => 160531 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3436976 [patent_doc_number] => 05429705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-04 [patent_title] => 'Apparatus for coating and/or etching substrates in a vacuum chamber' [patent_app_type] => 1 [patent_app_number] => 8/160923 [patent_app_country] => US [patent_app_date] => 1993-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1157 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/429/05429705.pdf [firstpage_image] =>[orig_patent_app_number] => 160923 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3485238 [patent_doc_number] => 05439552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-08 [patent_title] => 'Process of fabricating an enlongated microstructure element on a substrate' [patent_app_type] => 1 [patent_app_number] => 8/145697 [patent_app_country] => US [patent_app_date] => 1993-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 2920 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/439/05439552.pdf [firstpage_image] =>[orig_patent_app_number] => 145697 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3112994 [patent_doc_number] => 05409847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'Manufacturing method of CMOS transistor in which heat treatment at higher temperature is done prior to heat treatment at low temperature' [patent_app_type] => 1 [patent_app_number] => 8/141727 [patent_app_country] => US [patent_app_date] => 1993-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 51 [patent_no_of_words] => 11757 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/409/05409847.pdf [firstpage_image] =>[orig_patent_app_number] => 141727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3485167 [patent_doc_number] => 05439547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-08 [patent_title] => 'Semiconductor manufacturing apparatus with a spare vacuum chamber' [patent_app_type] => 1 [patent_app_number] => 8/140887 [patent_app_country] => US [patent_app_date] => 1993-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2910 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/439/05439547.pdf [firstpage_image] =>[orig_patent_app_number] => 140887 [rel_patent_id] =>[rel_patent_doc_number] =>)