Long Pham

Array ( [id] => 3083567 [patent_doc_number] => 05279992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-18 [patent_title] => 'Method of producing a wafer having a curved notch' [patent_app_type] => 1 [patent_app_number] => 7/857648 [patent_app_country] => US [patent_app_date] => 1992-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4170 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/279/05279992.pdf [firstpage_image] =>[orig_patent_app_number] => 857648 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3012338 [patent_doc_number] => 05332688 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'Method of manufacturing full CMOS type SRAM' [patent_app_type] => 1 [patent_app_number] => 7/855663 [patent_app_country] => US [patent_app_date] => 1992-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4770 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/332/05332688.pdf [firstpage_image] =>[orig_patent_app_number] => 855663 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2893377 [patent_doc_number] => 05272095 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-21 [patent_title] => 'Method of manufacturing heterojunction transistors with self-aligned metal contacts' [patent_app_type] => 1 [patent_app_number] => 7/853439 [patent_app_country] => US [patent_app_date] => 1992-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4881 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/272/05272095.pdf [firstpage_image] =>[orig_patent_app_number] => 853439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2936686 [patent_doc_number] => 05190884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-02 [patent_title] => 'Method of making vertical PNP transistor' [patent_app_type] => 1 [patent_app_number] => 7/852775 [patent_app_country] => US [patent_app_date] => 1992-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2635 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/190/05190884.pdf [firstpage_image] =>[orig_patent_app_number] => 852775 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2985139 [patent_doc_number] => 05266506 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-30 [patent_title] => 'Method of making substantially linear field-effect transistor' [patent_app_type] => 1 [patent_app_number] => 7/852369 [patent_app_country] => US [patent_app_date] => 1992-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5838 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/266/05266506.pdf [firstpage_image] =>[orig_patent_app_number] => 852369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2941622 [patent_doc_number] => 05254483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Gate-to-ohmic metal contact scheme for III-V devices' [patent_app_type] => 1 [patent_app_number] => 7/846225 [patent_app_country] => US [patent_app_date] => 1992-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2306 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/254/05254483.pdf [firstpage_image] =>[orig_patent_app_number] => 846225 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2985299 [patent_doc_number] => 05266515 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-30 [patent_title] => 'Fabricating dual gate thin film transistors' [patent_app_type] => 1 [patent_app_number] => 7/844077 [patent_app_country] => US [patent_app_date] => 1992-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4117 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/266/05266515.pdf [firstpage_image] =>[orig_patent_app_number] => 844077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3017141 [patent_doc_number] => 05302534 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Forming a vertical PNP transistor' [patent_app_type] => 1 [patent_app_number] => 7/844311 [patent_app_country] => US [patent_app_date] => 1992-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1576 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/302/05302534.pdf [firstpage_image] =>[orig_patent_app_number] => 844311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3049853 [patent_doc_number] => 05283203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-01 [patent_title] => 'Self-aligned contact process for complementary field-effect integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/843705 [patent_app_country] => US [patent_app_date] => 1992-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4130 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/283/05283203.pdf [firstpage_image] =>[orig_patent_app_number] => 843705 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2941675 [patent_doc_number] => 05254486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Method for forming PNP and NPN bipolar transistors in the same substrate' [patent_app_type] => 1 [patent_app_number] => 7/840721 [patent_app_country] => US [patent_app_date] => 1992-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3865 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/254/05254486.pdf [firstpage_image] =>[orig_patent_app_number] => 840721 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2973846 [patent_doc_number] => 05182218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Production methods for compound semiconductor device having lightly doped drain structure' [patent_app_type] => 1 [patent_app_number] => 7/837891 [patent_app_country] => US [patent_app_date] => 1992-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 4257 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182218.pdf [firstpage_image] =>[orig_patent_app_number] => 837891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3085833 [patent_doc_number] => 05278076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-11 [patent_title] => 'Method of marking a lateral mos controlled thyristor' [patent_app_type] => 1 [patent_app_number] => 7/837569 [patent_app_country] => US [patent_app_date] => 1992-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2564 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/278/05278076.pdf [firstpage_image] =>[orig_patent_app_number] => 837569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3017553 [patent_doc_number] => 05309022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-03 [patent_title] => 'Ni-Ge-Au ohmic contacts for GaAs and GaAlAs' [patent_app_type] => 1 [patent_app_number] => 7/834561 [patent_app_country] => US [patent_app_date] => 1992-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2148 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/309/05309022.pdf [firstpage_image] =>[orig_patent_app_number] => 834561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2982174 [patent_doc_number] => 05250450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance' [patent_app_type] => 1 [patent_app_number] => 7/835691 [patent_app_country] => US [patent_app_date] => 1992-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3137 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/250/05250450.pdf [firstpage_image] =>[orig_patent_app_number] => 835691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2978644 [patent_doc_number] => 05204277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-20 [patent_title] => 'Method of forming bipolar transistor having substrate to polysilicon extrinsic base contact' [patent_app_type] => 1 [patent_app_number] => 7/829669 [patent_app_country] => US [patent_app_date] => 1992-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3142 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/204/05204277.pdf [firstpage_image] =>[orig_patent_app_number] => 829669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2948592 [patent_doc_number] => 05262353 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-16 [patent_title] => 'Process for forming a structure which electrically shields conductors' [patent_app_type] => 1 [patent_app_number] => 7/829837 [patent_app_country] => US [patent_app_date] => 1992-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3141 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/262/05262353.pdf [firstpage_image] =>[orig_patent_app_number] => 829837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2918264 [patent_doc_number] => 05234851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-10 [patent_title] => 'Small cell, low contact assistance rugged power field effect devices and method of fabrication' [patent_app_type] => 1 [patent_app_number] => 7/829667 [patent_app_country] => US [patent_app_date] => 1992-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6234 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/234/05234851.pdf [firstpage_image] =>[orig_patent_app_number] => 829667 [rel_patent_id] =>[rel_patent_doc_number] =>)