Search

Long Pham

Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763
Total Applications
3774
Issued Applications
3306
Pending Applications
160
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2883637 [patent_doc_number] => 05268309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-07 [patent_title] => 'Method for manufacturing a photosensor' [patent_app_type] => 1 [patent_app_number] => 7/796441 [patent_app_country] => US [patent_app_date] => 1991-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1886 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/268/05268309.pdf [firstpage_image] =>[orig_patent_app_number] => 796441 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/796441
Method for manufacturing a photosensor Nov 21, 1991 Issued
Array ( [id] => 2839082 [patent_doc_number] => 05171696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-15 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 7/794901 [patent_app_country] => US [patent_app_date] => 1991-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 7493 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/171/05171696.pdf [firstpage_image] =>[orig_patent_app_number] => 794901 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/794901
Semiconductor device and method of manufacturing the same Nov 19, 1991 Issued
Array ( [id] => 3014643 [patent_doc_number] => 05340751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-23 [patent_title] => 'Method of manufacturing a BiMOS device' [patent_app_type] => 1 [patent_app_number] => 7/793540 [patent_app_country] => US [patent_app_date] => 1991-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4279 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/340/05340751.pdf [firstpage_image] =>[orig_patent_app_number] => 793540 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/793540
Method of manufacturing a BiMOS device Nov 17, 1991 Issued
Array ( [id] => 2893168 [patent_doc_number] => 05240869 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-31 [patent_title] => 'Method for fabricating a field effect transistor' [patent_app_type] => 1 [patent_app_number] => 7/785109 [patent_app_country] => US [patent_app_date] => 1991-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 25 [patent_no_of_words] => 6378 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/240/05240869.pdf [firstpage_image] =>[orig_patent_app_number] => 785109 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/785109
Method for fabricating a field effect transistor Oct 29, 1991 Issued
Array ( [id] => 2947705 [patent_doc_number] => 05230747 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-27 [patent_title] => 'Wafer having chamfered bend portions in the joint regions between the contour of the wafer and the cut-away portion of the wafer' [patent_app_type] => 1 [patent_app_number] => 7/783920 [patent_app_country] => US [patent_app_date] => 1991-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4150 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/230/05230747.pdf [firstpage_image] =>[orig_patent_app_number] => 783920 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/783920
Wafer having chamfered bend portions in the joint regions between the contour of the wafer and the cut-away portion of the wafer Oct 28, 1991 Issued
Array ( [id] => 2957989 [patent_doc_number] => 05198374 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-30 [patent_title] => 'Method of making biCMOS integrated circuit with shallow N-wells' [patent_app_type] => 1 [patent_app_number] => 7/783191 [patent_app_country] => US [patent_app_date] => 1991-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 3238 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/198/05198374.pdf [firstpage_image] =>[orig_patent_app_number] => 783191 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/783191
Method of making biCMOS integrated circuit with shallow N-wells Oct 27, 1991 Issued
Array ( [id] => 2857377 [patent_doc_number] => 05149663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-22 [patent_title] => 'Method for manufacturing a Bi-CMOS semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/780253 [patent_app_country] => US [patent_app_date] => 1991-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2591 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/149/05149663.pdf [firstpage_image] =>[orig_patent_app_number] => 780253 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/780253
Method for manufacturing a Bi-CMOS semiconductor device Oct 20, 1991 Issued
Array ( [id] => 3098320 [patent_doc_number] => 05314847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-24 [patent_title] => 'Semiconductor substrate surface processing method using combustion flame' [patent_app_type] => 1 [patent_app_number] => 7/768611 [patent_app_country] => US [patent_app_date] => 1991-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3534 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/314/05314847.pdf [firstpage_image] =>[orig_patent_app_number] => 768611 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/768611
Semiconductor substrate surface processing method using combustion flame Oct 17, 1991 Issued
Array ( [id] => 2894213 [patent_doc_number] => 05244835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-14 [patent_title] => 'Method of making contact electrodes of polysilicon in semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/774875 [patent_app_country] => US [patent_app_date] => 1991-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 2849 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/244/05244835.pdf [firstpage_image] =>[orig_patent_app_number] => 774875 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/774875
Method of making contact electrodes of polysilicon in semiconductor device Oct 10, 1991 Issued
Array ( [id] => 2948276 [patent_doc_number] => 05262335 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-16 [patent_title] => 'Method to produce complementary heterojunction bipolar transistors' [patent_app_type] => 1 [patent_app_number] => 7/772809 [patent_app_country] => US [patent_app_date] => 1991-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3996 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/262/05262335.pdf [firstpage_image] =>[orig_patent_app_number] => 772809 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/772809
Method to produce complementary heterojunction bipolar transistors Oct 7, 1991 Issued
Array ( [id] => 3957096 [patent_doc_number] => 05930614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method for forming MOS device having field shield isolation' [patent_app_type] => 1 [patent_app_number] => 7/765771 [patent_app_country] => US [patent_app_date] => 1991-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 31 [patent_no_of_words] => 5429 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930614.pdf [firstpage_image] =>[orig_patent_app_number] => 765771 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/765771
Method for forming MOS device having field shield isolation Sep 25, 1991 Issued
Array ( [id] => 2877674 [patent_doc_number] => 05185286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'Process for producing laminated semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 7/765933 [patent_app_country] => US [patent_app_date] => 1991-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2288 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185286.pdf [firstpage_image] =>[orig_patent_app_number] => 765933 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/765933
Process for producing laminated semiconductor substrate Sep 25, 1991 Issued
Array ( [id] => 2822704 [patent_doc_number] => 05168070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Electronic component, especially a permeable base transistor' [patent_app_type] => 1 [patent_app_number] => 7/765555 [patent_app_country] => US [patent_app_date] => 1991-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168070.pdf [firstpage_image] =>[orig_patent_app_number] => 765555 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/765555
Electronic component, especially a permeable base transistor Sep 24, 1991 Issued
Array ( [id] => 2971042 [patent_doc_number] => 05194396 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-16 [patent_title] => 'Method of fabricating BICMOS field effect transistors' [patent_app_type] => 1 [patent_app_number] => 7/763171 [patent_app_country] => US [patent_app_date] => 1991-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 30 [patent_no_of_words] => 2876 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 925 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/194/05194396.pdf [firstpage_image] =>[orig_patent_app_number] => 763171 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/763171
Method of fabricating BICMOS field effect transistors Sep 19, 1991 Issued
Array ( [id] => 2985974 [patent_doc_number] => 05212103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'Method of making a heterojunction bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 7/763155 [patent_app_country] => US [patent_app_date] => 1991-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3847 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212103.pdf [firstpage_image] =>[orig_patent_app_number] => 763155 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/763155
Method of making a heterojunction bipolar transistor Sep 19, 1991 Issued
Array ( [id] => 2941657 [patent_doc_number] => 05254485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Method for manufacturing bipolar semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/760987 [patent_app_country] => US [patent_app_date] => 1991-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 40 [patent_no_of_words] => 13836 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/254/05254485.pdf [firstpage_image] =>[orig_patent_app_number] => 760987 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/760987
Method for manufacturing bipolar semiconductor device Sep 16, 1991 Issued
Array ( [id] => 3094039 [patent_doc_number] => 05298462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-29 [patent_title] => 'Method of making metallization for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/756833 [patent_app_country] => US [patent_app_date] => 1991-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 2293 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/298/05298462.pdf [firstpage_image] =>[orig_patent_app_number] => 756833 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/756833
Method of making metallization for semiconductor device Sep 8, 1991 Issued
Array ( [id] => 2865766 [patent_doc_number] => 05162243 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-10 [patent_title] => 'Method of producing high reliability heterojunction bipolar transistors' [patent_app_type] => 1 [patent_app_number] => 7/752401 [patent_app_country] => US [patent_app_date] => 1991-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2995 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/162/05162243.pdf [firstpage_image] =>[orig_patent_app_number] => 752401 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/752401
Method of producing high reliability heterojunction bipolar transistors Aug 29, 1991 Issued
07/754185 QUASI-DIELECTRIC ISOLATION OF A BIPOLAR TRANSISTOR USING EPITAXIAL LATERAL OVERGROWTH Aug 26, 1991 Abandoned
Array ( [id] => 2875738 [patent_doc_number] => 05118635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process' [patent_app_type] => 1 [patent_app_number] => 7/749251 [patent_app_country] => US [patent_app_date] => 1991-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 1862 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/118/05118635.pdf [firstpage_image] =>[orig_patent_app_number] => 749251 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/749251
Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process Aug 22, 1991 Issued
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